Edgar Filing: ALTERA CORP

Market Share

Altera 10K 12312011

UNITED STATES

SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

(Mark One)



[x]		Annual report pursuant to Section 13 or 15(d) of the Securities Exchange Act of 1934

For the fiscal year ended December 31, 2011



[ ]		Transition report pursuant to Section 13 or 15(d) of the Securities Exchange Act of 1934

For the transition period from to

Commission File Number: 0-16617

ALTERA CORPORATION

(Exact Name of Registrant as Specified in its Charter)



Delaware (State or Other Jurisdiction of Incorporation or Organization)		77-0016691 (I.R.S. Employer Identification No.)

101 Innovation Drive, San Jose, California (Address of Principal Executive Offices)		95134 (Zip Code)

Registrant's Telephone Number, Including Area Code:

(408) 544-7000

Securities registered pursuant to Section 12(b) of the Act:

Common Stock, $0.001 par value per share

(Title of Class)

Name of Each Exchange on which registered:

The NASDAQ Global Select Market

Securities registered pursuant to Section 12(g) of the Act:

None

Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act.

Yes [x] No [ ]

Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act.

Yes [ ] No [x]

Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes [x] No [ ]

Indicate by check mark whether the registrant has submitted electronically and posted on its corporate Web site, if any, every Interactive Data File required to be submitted and posted pursuant to Rule 405 of Regulation S-T (§232.405 of this chapter) during the preceding 12 months (or for such shorter period that the registrant was required to submit and post such files).

Yes [x] No [ ]

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant's knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. [ ]

Indicate by check mark whether the registrant is a large accelerated filer, an accelerated filer, or a non-accelerated filer, or a smaller reporting company. See the definitions of “large accelerated filer,” “accelerated filer” and “smaller reporting company” in Rule 12b-2 of the Exchange Act.



Large accelerated filer [x]	Accelerated filer [ ]	Non-accelerated filer [ ]	Smaller reporting company [ ]

Indicate by check mark whether the registrant is a shell company (as defined in Rule 12b-2 of the Act). Yes [ ] No [x]

The aggregate market value of the registrant's common stock held by non-affiliates of the registrant was approximately $9,606,716,688 as of July 1, 2011 based upon the closing sale price on the NASDAQ Global Select Market for that date. For purposes of this disclosure, shares of common stock held by persons who hold more than 5% of the outstanding shares of common stock and shares held by executive officers and directors of the registrant have been excluded because such persons may be deemed affiliates. This determination is not necessarily conclusive. There were 322,374,696 shares of the registrant's common stock, $0.001 par value per share, issued and outstanding as of January 27, 2012.

DOCUMENTS INCORPORATED BY REFERENCE

Items 10, 11, 12, 13, and 14 of Part III incorporate information by reference from the Proxy Statement for the Annual Meeting of Stockholders which will be held on May 8, 2012 at 1:30 p.m. local time, at Altera's offices at 101 Innovation Drive, San Jose, California.



Table Of Contents
		Page
Part I		5
Item 1. Business		5
Item 1A. Risk Factors		17
Item 1B. Unresolved Staff Comments		23
Item 2. Properties		23
Item 3. Legal Proceedings		24
Item 4. Mine Safety Disclosures		25
Part II		26
Item 5. Market for Registrant's Common Equity, Related Stockholder Matters, and Issuer Purchases of Equity Securities		26
Item 6. Selected Financial Data		28
Item 7. Management's Discussion and Analysis of Financial Condition and Results of Operations		29
Item 7A. Quantitative and Qualitative Disclosures About Market Risk		42
Item 8. Financial Statements and Supplementary Data		43
Item 9. Changes in and Disagreements with Accountants on Accounting and Financial Disclosure		74
Item 9A. Controls and Procedures		74
Item 9B. Other Information		75
Part III		76
Item 10. Directors, Executive Officers and Corporate Governance		76
Item 11. Executive Compensation		76
Item 12. Security Ownership of Certain Beneficial Owners and Management and Related Stockholder Matters		76
Item 13. Certain Relationships and Related Transactions, and Director Independence		76
Item 14. Principal Accounting Fees and Services		76
Part IV		77
Item 15. Exhibits, Financial Statement Schedules		77

FORWARD-LOOKING STATEMENTS

This report and certain information incorporated herein by reference contains forward-looking statements, which are provided under the “safe harbor” protection of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally written in the future tense and/or are preceded by words such as “will,” “may,” “should,” “could,” “expect,” “suggest,” “believe,” “anticipate,” “intend,” “plan,” or other similar words. Examples of forward-looking statements include statements regarding:

• the growth prospects of the semiconductor industry and PLD market, including the FPGA and CPLD product sub-segments (see “Item 1: Business — Strategy and Competition” and “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• trends in our future sales, including our opportunities for growth by displacing ASICs, ASSPs and other fixed function chip alternatives (see “Item 1: Business — Strategy and Competition”, "Item 1: Business - Secular Trends Favoring PLDs: Tipping Point Economics and Silicon Convergence",“Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview” and "Item 7: Management's Discussion and Analysis of Financial Conditions and Results of Operations — Results of Operations");

• the commercial success of our new products (see “Item 1: Business” and “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• our market share in relation to competitors (see “Item 1: Business” and “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• the development trend of the “process technology gap”(see “Item 1: Business — Secular Trends Favoring PLDs: Tipping Point Economics and Silicon Convergence");

• the analysis that our new product families are more "silicon convergence-friendly" products (see “Item 1: Business — Strategy and Competition”)

• the timing of initial shipments of our Cyclone V FPGAs (see “Item 1: Business — Products”);

• the risk of exposure to product liability claims (see “Item 1A: Risk Factors — We may be subject to product liability claims”);

• our plan to continue making purchases under the stock purchase program (see “Item 5: Market for Registrant’s Common Equity, Related Stockholder Matters, and Issuer Purchase of Equity Securities”);

• the opportunities to further expand our position outside of the United States (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• the growth opportunity offered by our embedded initiative (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• our research and development costs and efforts (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Results of Operations”);

• the timing of shipments of our newer FPGA families (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• projections regarding if and when certain product sales may peak or decline (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview”);

• our gross margins and factors that affect gross margins (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Executive Overview” and “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Results of Operations”);

• our provision for tax liabilities and other critical accounting estimates (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Critical Accounting Estimates”);

• our capital expenditures (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Financial Condition, Liquidity, Credit Facility and Capital Resources”);

• our exposure to market risks related to changes in interest rates, equity prices and foreign currency exchange rates (see “Item 7A: Quantitative and Qualitative Disclosure About Market Risk”);

• future payments required pursuant to other agreements and commitments (see “Item 7: Management’s Discussion and Analysis of Financial Condition and Results of Operations — Contractual Obligations” and “Note 10 — Commitments and Contingencies to our consolidated financial statements”);

Forward-looking statements are not guarantees of future performance and involve risks and uncertainties. The forward-looking statements contained in this report are based on information currently available to us and expectations and assumptions that we deem reasonable at the time the statements were made. We do not undertake any obligation to update any forward-looking statements in this report or in any of our other communications, except as required by law. All such forward-looking statements should be read as of the time the statements were made and with the recognition that these forward-looking statements may not be complete or accurate at a later date.

Many factors may cause actual results to differ materially from those expressed or implied by the forward-looking statements contained in this report. These factors include, but are not limited to, those risks set forth in Item 1A: Risk Factors under Part I, Item 1A of this Annual Report on Form 10-K.

PART I

ITEM 1. BUSINESS.

Founded in 1983, Altera Corporation is a global semiconductor company, serving over 13,000 customers within the Telecom and Wireless, Industrial Automation, Military and Automotive, Networking, Computer and Storage, and Other vertical markets. The Other vertical market includes sub-markets of broadcast, consumer, medical and test. Our headquarters facility is located at 101 Innovation Drive, San Jose, California 95134, and our website is www.altera.com. Our common stock trades on the NASDAQ Global Select Market under the symbol ALTR.

Altera designs, manufactures, and markets a variety of products:


•	Programmable logic devices (“PLDs”), which consist of field-programmable gate arrays (“FPGAs”) and complex programmable logic devices (“CPLDs”), are standard semiconductor integrated circuits, or chips, that our customers program to perform desired logic functions in their electronic systems.

•

HardCopy^® application-specific integrated circuits (“ASICs”) transition customer designs from high-density FPGAs to low-cost non-programmable implementations for volume production. Because they are customized only on the last few mask layers, HardCopy ASICs deliver performance that can be an alternative to traditional ASICs, but with reduced development costs and shorter production lead times.


•	Pre-defined design building blocks, known as intellectual property (“IP”) cores, can be licensed by customers to add standard functions to their PLD designs.


•	Proprietary development software, which operates on personal computers and engineering workstations, is used by customers to develop, compile, and verify their designs, and then program their designs into our PLDs.

We were one of the first suppliers of complementary metal oxide semiconductor (“CMOS”) PLDs and are currently a global leader in this market. Our broad range of PLDs offers unique features as well as differing densities and performance specifications, and serves a wide range of customers.

An overview of typical PLD applications within these markets is shown in the table below.



VERTICAL MARKET	SUB-VERTICAL MARKET		APPLICATION/PRODUCT
TELECOM AND WIRELESS	TELECOM		• Transmission
			• Access
	WIRELESS		• Cellular infrastructure
			• Wireless local area networks ("LANs")
INDUSTRIAL AUTOMATION, MILITARY AND AUTOMOTIVE	INDUSTRIAL AUTOMATION		• Process control
			• Security/energy
			• Safety
	MILITARY		• Secure communications
			• Radar
			• Intelligence
	AUTOMOTIVE		• Driver assistance
			• Entertainment
NETWORKING, COMPUTER AND STORAGE	NETWORKING		• Routers
			• Switches
	COMPUTER		• Servers
			• Mainframes
	STORAGE	`	• Solid state drive ("SSD") and redundant array of independent disks ("RAIDs") storage systems
			• Storage area networks ("SANs")
	OFFICE AUTOMATION		• Copiers
			• Printers
OTHER	BROADCAST		• Studio
			• Audio/video
	CONSUMER		• Set-top decoder boxes
			• High definition television ("HDTV")
	MEDICAL		• Diagnostic imaging
	TEST		• Semiconductor
			• Communications

Basic System Design and Implementation

Most electronic systems use three types of digital integrated circuits:


•	Processors, which include microprocessors, microcontrollers, and digital signal processors, control central computing tasks and signal processing.


•	Memory stores programming instructions and data.


•	Logic manages the interchange and manipulation of digital signals within a system.

System designers typically use standard architectures to meet their processor and memory needs. System differentiation may be realized through the development of software algorithms that are executed by a processor, as well as specialized hardware that has been designed into the logic circuits.

Most applications use one or more of the following types of devices to implement designs:

•

ASICs - Often referred to as standard cells, ASICs are manufactured with custom designs created by the customer. An ASIC is developed with custom logic targeted to a specific end application. An ASIC may also include licensed microprocessor and memory cores which may allow limited software programmability through the modification of software algorithms that are executed on the microprocessor. Each ASIC has a targeted function used by a single customer in a single application.


•	Application-specific standard products (“ASSPs”) - ASSPs are standard devices that utilize a development methodology that is similar to an ASIC. However, in contrast to an ASIC, which is built for a single customer, an ASSP is built for a specific type of application targeted to a small number of customers. ASSPs are sometimes described as ASICs developed for multiple customers.

•

PLDs - Unlike ASICs and ASSPs, PLDs are standard products that can be customized for a wide range of applications. While originally developed for logic implementation, more recent PLD architectures have evolved to include various memory, digital signal processing ("DSP"), embedded microprocessor and even analog functionality. PLDs are typically sold to hundreds or thousands of customers. This flexibility offers many advantages, including simple design changes, shorter design cycles, and lower development costs.

PLDs vs. ASICs and ASSPs

In a broad sense, PLDs, ASICs and ASSPs compete with each other as they may be used in the same types of applications in electronic systems. However, differences in cost, performance, density, flexibility, ease-of-use, and time-to-market dictate how much they directly compete for particular applications. The table below summarizes key characteristics of ASICs, ASSPs, and PLDs.



	ASIC	ASSP	PLD
CUSTOMIZABLE	Yes, by chip fabrication facility	No	Yes, by end user
ERASABILITY/REPROGRAMMABILITY	No	No	Yes
RELATIVE TIME TO MARKET	Slow	Immediate	Fast
RELATIVE UNIT COST	Low	Moderate	Moderate to high
CUSTOMER'S DEVELOPMENT COST	High	Low	Moderate
FIELD UPGRADABILITY	No	No	Yes

In contrast to ASICs, PLD designs are programmed directly into the PLD. This means that the PLD is fully functional and verified when the design is completed, avoiding the lengthy and complex cycles required to verify and fabricate ASICs. This user programmability allows PLD customers to test and revise their designs quickly and with minimal development cost. In addition to these ease-of-use and time-to-market advantages, PLDs can be upgraded in the field, which allows customers to modify the PLD design after the electronic system has been shipped.

Customers use ASSPs when they need specific fixed functions with little differentiation, for example when implementing certain electronic industry standards. However, ASSPs have highly targeted functionality, which limits the range of applications they can address. In contrast to ASSPs, PLD flexibility allows customers to define functionality to suit their needs, rather than restrict their system architecture based on ASSP manufacturer specifications. Furthermore, PLD designers can add IP design blocks to execute standardized functions otherwise performed by ASSPs.

These design flexibility advantages historically resulted in a relatively high unit cost for PLDs. Programmability required a larger die size, which typically translated into a higher per-unit cost when compared with ASICs or ASSPs manufactured using the same process technology. As a result, unit volume for PLDs was typically lower than for ASICs or ASSPs. In addition to driving higher cost, the larger die area caused by programmable circuitry also had disadvantages in terms of performance and power consumption for PLDs when compared with ASICs or ASSPs manufactured using the same process technology.

Secular Trends Favoring PLDs: Tipping Point Economics and Silicon Convergence

While PLDs carry the burden of extra die area needed for programmability, the die size difference versus ASICs and ASSPs has decreased in recent years due to the fact that PLDs are being manufactured on more advanced process technology. For our most current designs, PLD process technology is typically two or three process generations more advanced than competing ASIC and ASSP process technology. As chip manufacturing becomes more advanced, the total cost of chip development increases, reducing the cost advantage of ASICs and ASSPs. As a result, some ASIC and ASSP suppliers choose to use non-leading-edge process technology for new designs to reduce costs. We believe this has brought us to a “tipping point” with respect to our opportunity to displace ASICs and ASSPs. It is no longer technologically feasible for ASIC and ASSP suppliers to continue to use old process generations for technically advanced systems, and, at the same time, it is not economically feasible for them to use new generations of technology for low and mid-range volume applications. The “process technology gap” between PLDs and ASIC and ASSP alternatives will increase over time and, when combined with the traditional PLD advantages of greater flexibility, lower development cost and faster time-to-market, should drive the accelerated adoption of PLDs in the years ahead.

In order to compete effectively in their end markets, developers of electronic systems continuously seek ways to improve system performance, lower power consumption and reduce system cost. As a result, system engineers evaluate different semiconductor alternatives in order to find the optimum solution for each sub-system, which must then be interconnected with all other sub-systems while remaining in compliance with the technical and commercial specifications of the overall system. In reaction to the needs of system developers, state-of-the-art semiconductor design has moved increasingly toward silicon convergence, or the combination of multiple semiconductor types including processors, analog devices, and memories, into a single device. Silicon convergence allows for a reduction in the number of devices in a single system, the delay caused by chip-to-chip connectivity, and in the amount of I/O switching power consumed. Silicon convergence is facilitated through the licensing of standard architectures for microprocessors and memories. Once licensed, the microprocessors and memory cores may be combined with additional circuitry and custom logic into a single integrated circuit.

We believe that innovations in PLD architecture and PLD development tools have also contributed to the increasing use of PLDs over ASICs and ASSPs. Newer PLD capabilities, such as high speed transceivers, Programmable Power Technology, embedded DSP and embedded microprocessors are helping PLDs become more "silicon convergence-friendly," thereby allowing electronics engineers to use PLDs to meet increasingly complex system requirements for performance, power consumption and cost. Furthermore, licensed IP cores for microprocessors and memory are commercially available but licensed cores for PLDs are not available. As a result, with the increasing trend towards silicon convergence, the impact of "tipping point" economics and the ever-increasing need for programmability within an electronic system, we believe that customers will increasingly turn to PLD suppliers for not only logic functionality, but also for system integration, in both prototyping and production quantities.

Strategy and Competition

Our greatest growth opportunity is in the displacement of ASICs and ASSPs in the development of next generation electronic systems. We believe that the fundamental benefits of programmability, combined with the secular trends related to semiconductor economics and the tipping point, and the movement toward silicon convergence, favors the use of PLDs over alternative semiconductors including ASICs and ASSPs. Our strategy in recent years has not only been to add more prototyping customers, but more importantly, to use cost-optimized products to increase our penetration into higher-volume applications and end markets.

PLD vendors have innovated and used the most advanced process technology to rapidly reduce PLD cost structure and power consumption while increasing device speed and density. This makes programmable logic an increasingly competitive alternative to ASICs and ASSPs and will likely increase the use of PLDs. In addition, the ability to quickly and efficiently integrate system-level IP within a PLD not only provides advantages relative to ASICs and ASSPs, but it also allows the displacement of other semiconductor products, including embedded processors, digital signal processors and microcontrollers.

To capture a larger share of the chips purchased by our customers, we focus on providing the most advanced programmable solutions:


•	PLDs with tailored architectures to provide the speed, density, low power consumption, functionality and package types to meet customer needs


•	PLDs optimized for low-cost and high-volume applications


•	HardCopy ASICs to enable our customers to move easily from our largest PLDs to a low-cost ASIC


•	Optimized, pre-verified system-level IP cores to speed the design process


•	State-of-the-art development tools that offer low cost, ease of use, and compatibility with other industry-standard electronic design automation (“EDA”) tools


•	A complete customer support system

Not only do we compete with other PLD vendors such as Lattice Semiconductor Corporation, Microsemi Corporation, and Xilinx Inc., but we may also encounter a variety of other semiconductor vendors during a given customer engagement. Semiconductor companies with whom we may compete include Analog Devices Inc., Applied Micro Circuits Corporation, Broadcom Corporation, Freescale Semiconductor Inc., Intel Corporation, LSI Corporation, Marvell Technology Group, Ltd., Microchip Technology Inc., NEC Corporation, Nvidia Corporation, PMC-Sierra Inc., ST Microelectronics, Texas Instruments Inc., Toshiba Semiconductor Company and Vitesse Semiconductor Corporation.

Within the PLD market, there are two distinct sub-segments, CPLDs and FPGAs, which comprise the majority of revenues but, due to product differences, usually do not compete directly for the same customer designs. The FPGA market has outgrown the CPLD market over the last several years. FPGAs now account for approximately 81% of total PLD sales and are expected to continue to be the fastest growing segment of the PLD market. Based on our estimates, we believe that our share of the FPGA market increased from 33% in 2006 to 41% in 2011, and that maintaining or increasing our FPGA market share is important to our long-term growth.

Competition is most intense in the “design-win” phase of the customer's design, when customers select products for use in their systems. Because each vendor's products are proprietary, "drop-in replacement" devices are not available and the cost of switching to a different vendor's products after a system has been designed and prototyped is very high. Therefore, customers rarely switch vendors after the initial selection for a particular design. From the time a design win is secured, it can be two or more years before the customer starts volume purchases of selected devices. The selection may take place relatively early in the design process, but it may take several years to complete system design, build prototypes, sample the marketplace for customer acceptance, make modifications and manufacture in volume. As a result, there is a delay between developing a competitive advantage and experiencing a shift in PLD market share, meaning that market share is a lagging indicator of relative competitive strength. Because it is extremely difficult to forecast the success or timing of a customer's product, and because the end markets are highly fragmented (we have over 13,000 customers), it is difficult even for PLD vendors to gauge their competitive strength based on winning designs at a particular point in time.

The principal competitive factors in the PLD market include:


•	Technical innovation


•	Device performance, power consumption, and features


•	Capability and productivity of software development tools and IP cores


•	Pricing and availability


•	Quality and reliability


•	Technical service and customer support


•	Manufacturing and operational competence


•	Customer familiarity with existing vendors and entrenched products

We believe that we compete favorably with respect to these factors and that our proprietary and tailored device architectures and installed base of software development systems provides additional competitive advantage. Due to unique architectural innovation and advanced technologies, our new product families provide greater functionality and lower power consumption at a lower price for any given logic density compared with their predecessors. Newer product features such as multi-gigabit transceivers and variable-precision DSP blocks have enhanced our design-win rate relative to other PLD vendors.

We also believe that our new product families are more "silicon convergence-friendly" and offer capabilities that allow us to compete more favorably against ASICs and ASSPs, as well as against other types of chips such as microcontrollers, microprocessors, and digital signal processors. Designers can add some of the functionality of these other chips to PLDs using pre-built and pre-verified IP cores. An IP core is typically offered in either a “hard” or “soft” form. Altera, at the time of chip development for our PLDs, can embed a hard IP core into the actual circuitry of the PLD. A soft IP core is a licensed design file that our customers incorporate into their design and program onto the PLD. By incorporating more functionality and logic capacity on a programmable chip while providing the necessary design tools and IP cores to design a reliable system, we believe we can enhance the advantages of PLDs over competing solutions.

As is true of the semiconductor industry as a whole, the digital logic segment and the PLD sub-segment are intensely competitive, and each successive product generation is characterized by rapid technological change and price decline. All of these factors may adversely affect our future operating results.

Products

Our products consist primarily of devices, IP cores and proprietary development tools. A brief overview of these products follows.

Devices

Our devices fall into the following four categories, spanning multiple architectures and families with numerous product options:


•	FPGAs


•	CPLDs


•	HardCopy ASICs


•	Configuration devices that store the programming code for our FPGAs

Our percentage of net sales by product category is as follows:



Product	2011		2010		2009

FPGAs	81	%	82	%	77	%
CPLDs	10	%	12	%	15	%
Other products ⁽¹⁾	9	%	6	%	8	%

(1) Including HardCopy ASICs, configuration devices, IP cores, and development tools

Each device family has unique functional benefits and different density and performance specifications. Some of our latest device families, typically designed into new equipment, are summarized and described below.

Stratix Series High-End, System-Level FPGAs

Our Stratix^® product families are built using advanced CMOS process technology and address a broad range of applications requiring system integration across all our markets. Programmable Power Technology in Stratix FPGAs helps provide high performance and low total power consumption. Embedded HardCopy blocks within our Stratix V FPGA architecture enable Altera to quickly create application-targeted devices by efficient hardening of standard or logic-intensive functions, providing further improvements in speed and lower power consumption while offering flexible embedded system functionality. Additionally, our Stratix V GX and Stratix V GT FPGAs offer advanced transceiver capabilities for applications that require reliable, multi-gigabit serial data transfer rates of up to 28 Gbps. Our Stratix V GS FPGAs are optimized for applications requiring high performance, variable precision DSP.

Arria Series Mid-Range, Transceiver- and Embedded Processor-Equipped FPGAs

Our Arria^® product families are built using advanced CMOS process technology and enable a simplified transceiver-based design for applications requiring high-performance data transfer protocols. Arria V GX FPGAs offer best-in-class signal integrity with data transfer rates of up to 10 Gbps, providing designers a high-quality and reliable solution for next-generation high-bandwidth systems across all our markets. In addition, our Arria V SoC FPGAs integrate an ARM^®-based hard processor system consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. It combines the performance and power savings of hard intellectual property with the flexibility of programmable logic.

Cyclone Series Low-Cost, Transceiver- and Embedded Processor-Equipped FPGAs

Our Cyclone^® product families are built using advanced CMOS process technology and bring programmable flexibility to cost-sensitive applications in all our markets. Our Cyclone IV and Cyclone V FPGAs use low-power process technology to meet

market requirements for low power consumption. Additionally, our Cyclone V GX FPGAs incorporate up to 12 integrated transceivers with data rates up to 5 Gbps. Architectural innovation allows Cyclone FPGAs to combine a low-cost structure with abundant device resources, making them ideal for high-volume applications. Our Cyclone V SoC FPGAs integrate an ARM-based hard processor system consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. It combines the performance and power savings of hard intellectual property with the flexibility of programmable logic. Initial shipments of our Cyclone V FPGAs are planned in 2012.

MAX Series CPLDs

Our MAX^® families are instant-on, non-volatile CPLDs that are used in general purpose and portable designs for a broad range of electronics equipment. Our MAX V CPLDs have a revolutionary architecture that significantly reduces total power consumption when compared with competing CPLDs. For the most demanding low-power and battery-operated portable applications, our MAX V CPLDs offer microamp standby current in ultra-small-chip packaging.

HardCopy ASICs

Our HardCopyASICs offer customers a migration path from high density FPGA families to a low-cost ASIC for high-volume production. For a given process technology, HardCopy ASICs deliver nearly the performance of comparable cell-based ASICs, but with reduced development costs and shorter production lead-times.

In contrast to traditional cell-based ASICs, in which every mask layer is custom and unique to the customer's design, our HardCopy ASICs share a common set of base layers so only the last few mask layers are customized to implement the customer's design. By removing the configuration circuitry, programmable routing, and programmability for logic and memory, we reduce the die size and therefore device cost, but deliver functionality, performance and power characteristics that are equivalent to or more favorable than that of an FPGA.

As a result, customers get the flexibility and time-to-market advantages of a high-density FPGA during the prototyping and early production phases, and then convert the design to a HardCopy ASIC for high-volume production. This allows HardCopy ASICs to be used in high-volume cost-sensitive applications historically served by traditional cell-based ASICs.

Intellectual Property Cores

IP cores are pre-verified building blocks that execute system-level functions. By incorporating more functionality and logic capacity on a programmable chip while providing the necessary design tools and IP cores to design a reliable system, we believe we can enhance the advantages of PLDs over competing solutions.

An IP core is typically offered in either a “hard” or “soft” form. A hard IP core is embedded into the actual circuitry of our chips, which yields a small die area and typically provides advantages in cost, performance, and power consumption. Our recent FPGA product generations have introduced hard IP cores such as variable-precision DSP blocks, multi-gigabit transceivers, embedded processor cores and a variety of interface protocols.

A soft IP core is a licensed design file that our customers incorporate into their design and program onto the PLD. Customers integrate IP cores in their PLD designs with our proprietary development software. Soft IP cores available for use in our devices include our Nios^® series of embedded processors, our portfolio of MegaCore^® functions that we license to our customers, and our Altera Megafunction Partners Program ("AMPP^SM") cores, which are pre-verified by us and licensed to our customers by third parties.

The Nios series of embedded processors uses a reduced instruction-set computing (“RISC”) architecture and can be efficiently used in our FPGAs and HardCopy ASIC devices as a cost-competitive and flexible alternative to discrete microcontroller solutions. The Nios series of embedded processors compete favorably with many discrete microcontrollers. Other embedded processor IP cores, both hard and soft implementations, are also offered and supported by Altera through partnership agreements with companies including ARM Ltd. and MIPS Technologies.

With IP cores, system designers can focus more time and energy on improving and differentiating the unique aspects of their system designs, rather than spending time designing common off-the-shelf functions. IP cores are essential to providing solutions with higher levels of integration and faster time to market. Today, we offer a broad range of soft IP cores for DSP algorithms, bus interfaces, memory controllers, telecommunications, data communications, microprocessors, and peripherals.

Before licensing a soft IP core, customers can download an encrypted soft IP core from our website and verify that it works in their own system designs. While licensing soft IP cores represents a small portion of our net sales, we believe a broad product offering in this area is necessary to compete with ASIC and ASSP vendors as well as other PLD vendors.

Development Tools

To enhance engineering productivity, customers use our proprietary development tools, consisting primarily of the Quartus^® II software, for design entry, design compilation, design verification, and device programming.

Designers can use our development tools on a variety of computing platforms, including Microsoft Windows, UNIX (including Solaris and HP-UX), and Linux operating environments, with built-in interfaces to industry-standard EDA tools offered by Cadence Design Systems, Inc., Mentor Graphics Corporation, Synopsys, Inc. and others.

Like IP cores, our development tools generate less than 10% of our net sales, but are a critical and necessary element of our product portfolio because they are used to program our devices and can drive our success in competing for design wins against PLD, ASIC and ASSP vendors.

Research and Development

Our research and development activities focus primarily on PLDs, HardCopy ASICs, IP cores, development software and hardware. We develop these related products in parallel to provide comprehensive design support to customers. As a result of our research and development efforts, we introduced a number of new families in recent years, including the Stratix V (including E, GX, GS and GT), Stratix IV (including E, GX and GT), Stratix III, Cyclone V (including E, GX, GT and SoC), Cyclone IV (including E and GX), Cyclone III, Arria V (including E, GX, GT and SoC), Arria II GX, MAX V, MAX II, HardCopy IV and HardCopy III device families, as well as major enhancements to our IP core offerings and the Quartus II development platform.

Our research and development costs, which are charged to expense as incurred, were $325.7 million in 2011, $264.6 million in 2010 and $260.2 million in 2009.

Patents, Trademarks, and Licenses

We rely on intellectual property laws, including patent, copyright, trademark, and trade secret laws, to establish and maintain our proprietary rights in products and technology. Activities include:


•	Patents - As of December 31, 2011, we owned more than 2,460 United States and 335 foreign patents. We also had more than 1,160 patent applications pending worldwide.


•	Trademarks - We use, register and apply to register certain trademarks and service marks in the United States and foreign countries.


•	Product registrations - We file registrations in the United States under the Semiconductor Chip Protection Act to protect our chip designs.


•	When appropriate, we file lawsuits to protect our intellectual property rights.

We have also licensed technology that allows us to design, manufacture and sell products using certain intellectual property owned by others.

Marketing and Sales

We market our products worldwide through a network of distributors, independent sales representatives and direct sales personnel.

Altera Distributors

In all of the major geographic markets that we serve, we work with distributors to provide demand creation for the broad customer base and order-fulfillment services for most of our customers. These distributors are franchised by component manufacturers to sell a wide variety of products to many customers, and they may sell competing products or solutions. We have contracts with our distributors that can be terminated by either party upon notice.

All of our distributors stock inventory of our products. Distributors purchase products from us at a set distributor cost denominated in U.S. dollars. Title and risk of loss transfer upon shipment from our stocking locations, which are located in the Asia Pacific region at the independent subcontractors that we employ for test and assembly services or at our warehouse in San Jose. When products are shipped to a distributor, we defer revenue on the sale until the distributor sells the products in accordance with our revenue recognition policy. Consequently, the deferred revenue and the corresponding deferred cost of sales are recorded as a current liability under the caption Deferred income and allowances on sales to distributors. All payments to us are denominated in U.S. dollars. For a detailed discussion of our revenue recognition policy, see Note 2 - Significant Accounting Policies - Revenue Recognition to our consolidated financial statements.

Our sales cycle begins with a “design-win” phase, which can be lengthy, is uncertain and often requires the ongoing participation of sales, engineering and managerial personnel. Once customer demand has been created and a design is ready to move to prototyping or production, the order-fulfillment process begins. Customer orders are primarily processed and fulfilled by a local distributor. For these orders, our distributors are the legal sellers of the products and therefore bear all risks related to the ownership and sale of the products, including credit loss, inventory shrinkage and theft and foreign currency fluctuations. For certain arrangements, Altera drop ships products to fulfill orders processed through our primary distributor.

Our distributors periodically return certain amounts of unsold product and receive price concessions for unsold product if we reduce prices. For high-volume or competitive situations, we often provide price concessions to our distributors. A customer purchasing a small quantity of product from a distributor usually pays list price. However, a customer using our products in volume production, purchasing thousands or even hundreds of thousands of units, will often negotiate a substantial price discount from the distributor. Under these circumstances, the distributor will often negotiate and receive a price concession from Altera. These price concessions are negotiated in U.S. dollars. Average aggregate price concessions typically range from 65% to 80% of our list price on an annual basis, depending upon the composition of our sales, volume and factors associated with timing of shipments to distributors or payment of price concessions. This is a standard practice in the semiconductor industry, and we generally provide some level of price concession to every distributor.

Our net sales are the sum of our own direct sales to original equipment manufacturers, or OEMs, plus our distributors' resale of Altera products. For 2011, 2010 and 2009, worldwide sales through distributors for subsequent resale to OEMs or their subcontract manufacturers accounted for 73%, 81% and 82% respectively, of our net sales. Arrow Electronics, Inc. including its affiliates (“Arrow”), our largest distributor, accounted for 39% of our net sales in 2011, 46% in 2010 and 45% in 2009. Our second largest distributor, Macnica, Inc. including its affiliates (“Macnica”), accounted for 21% of our net sales in 2011, 20% in 2010 and 15% in 2009. No other distributor accounted for more than 10% of our net sales in 2011, 2010 or 2009.

Altera Sales, Marketing, and Customer Support

Altera has a dedicated global sales and marketing organization to create customer demand and manage our network of distributors and independent sales representatives. We focus our direct demand creation efforts on a limited number of key accounts, and provide technical, business and marketing support to distributors and independent sales representatives. Independent sales representatives, who are mostly located in North America and in select European countries, create demand and provide customer support in a defined territory and often with a defined set of customers. They do not stock inventory or fulfill orders. All of our contracts with independent sales representatives can be terminated by either party upon notice.

Customer support and service are important to selling and marketing our products. We provide several levels of technical support, including application assistance, design services, and customer training. We also publish data sheets and application notes, conduct technical seminars and provide design assistance to customers via the Internet and electronic links.

We have domestic sales offices in numerous major metropolitan areas throughout the United States, and we maintain international sales support offices in Bangalore, Beijing, Cork, Chengdu, Helsinki, Hong Kong, London, Munich, Osaka, Ottawa, Paris, Seoul, Shanghai, Shenzhen, Singapore, Stockholm, Taipei, Tokyo, Toronto and Turin.

Huawei Technologies Co., Ltd. (“Huawei”), an OEM, individually accounted for 13% of net sales in each 2011, and 2010, and 11% of net sales in 2009. No other individual OEM accounted for more than 10% of net sales in 2011, 2010 or 2009.

International Sales

Sales outside of the U.S. and Canada constituted 81% of net sales in each of 2011 and 2010, and 80% of net sales in 2009. Sales to Japan accounted for 15% of net sales in 2011, 16% of net sales in 2010 and 18% of net sales in 2009. Sales to China accounted for 33% of net sales in each of 2011 and 2010 and 27% of net sales in 2009. Except for the United States, China and Japan, no other country accounted for sales in excess of 10% of net sales during 2011, 2010 or 2009. For a detailed description of our sales by geographic region, see Item 7: Results of Operations - Sales by Geography, and Note 15 - Segment and Geographic Information to our consolidated financial statements.

Backlog

Our backlog consists of distributor orders, as well as certain OEM orders, that are for delivery within the next three months. Our backlog of orders as of December 31, 2011 was approximately $1.2 billion, compared with $2.0 billion as of December 31, 2010.

Historically, backlog is a poor predictor of future sales or customer demand for the following reasons:


•	While our backlog increases during periods of high demand and supply constraints, purchasers may, in most cases, cancel product orders up to 30 days before the scheduled delivery date without incurring significant cancellation penalties.


•	Our backlog is valued at list price, which in most cases is substantially higher than the price ultimately recognized as revenue.

Manufacturing

Wafer Supply

Die, cut from silicon wafers, are the essential components of all our devices and comprise a significant portion of the total device cost. Our manufacturing strategy is known as a “fabless” business model since we purchase our silicon wafers from independent semiconductor foundries instead of manufacturing them ourselves. This strategy allows us to take advantage of these suppliers' economies of scale and gives us direct and timely access to advanced process technology. We purchase our silicon wafers from Taiwan Semiconductor Manufacturing Company (“TSMC”), an independent semiconductor foundry. We have no formalized long-term supply or allocation commitments from TSMC. In the past, we have used other foundry vendors, and we may establish additional foundry relationships as they become economically beneficial or technically necessary.

Testing and Assembly

After wafer manufacturing is completed, each silicon wafer is tested using a variety of test and handling equipment that is owned by us and consigned to our partners. The vast majority of our silicon wafer testing is performed at TSMC.

The wafers are then shipped to various assembly suppliers in Asia, where they are sorted into good die and encapsulated in packages. We use a number of independent assembly suppliers to take advantage of their economies of scale and supply flexibility, and to give us direct and timely access to advanced packaging technology. We purchase almost all of our assembly services from Amkor Electronics, Inc. (“Amkor”) in Korea and the Philippines, and Advanced Semiconductor Engineering, Inc. (“ASE”) in Malaysia and Taiwan.

Following assembly, each packaged unit completes final testing, marking and inspection before being packaged for storage as finished goods. We also use Amkor and ASE for almost all of our final test and back-end operation services. These partners perform final testing using our proprietary test software operating on hardware that is consigned to or owned by our suppliers.

The majority of our inventory, including finished goods, is warehoused in Asia at our subcontract test and assembly partners. These suppliers also ship our products to OEMs and distributors.

Executive Officers

Our executive officers and their ages as of February 17, 2012 are as follows:



Name	Age	Position
John P. Daane	48	Chairman, President, and Chief Executive Officer
Danny K. Biran	55	Senior Vice President, Strategy
William Y. Hata	52	Senior Vice President, Worldwide Operations and Engineering
Kevin H. Lyman	57	Senior Vice President, Human Resources
George A. Papa	63	Senior Vice President, Worldwide Sales
Ronald J. Pasek	51	Senior Vice President and Chief Financial Officer
Katherine E. Schuelke	49	Senior Vice President, General Counsel, and Secretary
Jeffrey W. Waters	47	Senior Vice President Military, Industrial and Computing Division

There are no family relationships among our executive officers or between any executive officer and any of our directors.

John P. Daane joined us as our president and chief executive officer in November 2000 and was elected as one of our directors in December 2000 and as chairman of the board in May 2003. Before joining us, Mr. Daane spent 15 years at LSI Logic Corporation, a semiconductor manufacturer, most recently as executive vice president, communications products group, with responsibility for ASIC technology development and the computer, consumer, and communications divisions.

Danny K. Biran joined us in January 2005 as vice president, product and corporate marketing and became senior vice president, product and corporate marketing in May 2007. He became senior vice president, marketing in March 2009 and senior vice president, strategy in January 2012. Prior to joining us, Mr. Biran was president and CEO of Silverback Systems from 2001 to 2005. Mr. Biran has 25 years of semiconductor experience, including positions at LSI Logic Corporation and National Semiconductor.

William Y. Hata joined us in December 1999 as vice president of product engineering. In March of 2007, Mr. Hata was promoted to vice president, worldwide operations and engineering, and in 2008 he was promoted to senior vice president, worldwide operations and engineering. Before joining us, he was director of foundry operations and product engineering at National Semiconductor.

Kevin H. Lyman joined us in January 2008 as our vice president of human resources and was promoted to senior vice president of human resources in February 2011. Before joining us, Mr. Lyman most recently served as senior vice president of corporate human resources at Advanced Micro Devices. Before that, Mr. Lyman held a variety of human resources management roles at Lockheed, GenRad and General DataComm Industries.

George A. Papa joined us in February 2002 as senior vice president, worldwide sales. From February 2000 to February 2002, Mr. Papa served as vice president of worldwide sales of the communications business group of Marvell Semiconductor, Inc., a semiconductor company. From March 1997 to February 2000, he served as vice president of worldwide sales for Level One Communications, Inc., a subsidiary of Intel Corporation, a semiconductor company. From February 1991 to March 1997, Mr. Papa served as vice president of North American sales for Siemens Corporation, a diversified global technology company.

Ronald J. Pasek joined us in December 2009 as senior vice president and chief financial officer. Before joining us, Mr. Pasek served as vice president and corporate treasurer of Sun Microsystems, from February 2008 to December 2009. He held a variety of other positions in finance at Sun Microsystems over a 19 year period, including vice president of worldwide field finance, worldwide manufacturing finance and U.S. field finance.

Katherine E. Schuelke joined us in March 1996 as corporate attorney. She became senior corporate attorney in July 1997, assistant general counsel and assistant secretary in July 1999, and vice president, general counsel and secretary in October 2001. In February 2011, she was promoted to senior vice president, general counsel and secretary. Before joining us, Ms. Schuelke was an attorney at the law firm of Morrison & Foerster LLP for seven years.

Jeffrey W. Waters joined us in January 2012 as senior vice president and general manager of the military, industrial and computing division. Prior to joining us, Mr. Waters was most recently with Texas Instruments / National Semiconductor as product line vice

president, precision signal path division. He was with National Semiconductor for 18 years in positions including vice president of sales and marketing for Japan, vice president of worldwide marketing, as well as a variety of marketing and engineering management roles in analog and microprocessors. Prior to his time at National Semiconductor, Mr. Waters held positions in management consulting as well as in research and development.

Employees

As of December 31, 2011, we had 2,884 employees, of which 1,211 were located in the United States. We have not had any work stoppages, and we believe that our employee relations are good.

Access to Altera's Reports

Our annual reports on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K, and amendments to reports filed to comply with Sections 13(a) and 15(d) of the Securities Exchange Act of 1934, are available free of charge on our website at www.altera.com, as soon as possible after they are filed with the Securities and Exchange Commission (“SEC”). To get a free copy, contact Altera Corporation, Attn: Investor Relations, 101 Innovation Drive, San Jose, California 95134.

Our SEC filings are available at the SEC's website at www.sec.gov, and may be read and copied at the SEC's public reference room at 100 F Street NE, Washington, DC 20549. Please call the SEC at 1-800-SEC-0330 for more information.

ITEM 1A. RISK FACTORS.

The following risk factors, among others that are not presently known or that we currently believe unimportant, could affect our future results and could cause our actual results to differ materially from those expressed in our forward-looking statements. Before you decide to buy, hold, or sell our common stock, you should carefully consider these risks, in addition to the other information contained in this report. Our business, financial condition, and operations results could be seriously harmed if any of the events described here actually occurs. In that situation, the market price for our common stock could decline, and you may lose all or part of your investment.

Our financial results are affected by general economic conditions and the highly cyclical nature of the semiconductor industry.

Semiconductor companies, such as Altera, experience significant fluctuations in sales and profitability. The semiconductor industry has experienced economic downturns and business contractions from time to time, which can be severe and prolonged. The fluctuations follow the turns of the global economy and in a downturn can result in significant reductions in product demand and excess customer inventories. Global economic weakness or cyclical downturns have previously resulted from periods of economic recession, reduced access to credit markets, weakening or strengthening of the U.S. dollar relative to other currencies, weak end-user demand, excess industry capacity or general reductions in inventory levels by customers. It is difficult for our customers, our vendors and us to accurately forecast and plan future business activities in today's global economy.

Our ability to predict the quantity and type of products our customers will need in the future is challenging because our customers face volatile pricing and unpredictable demand for their own products and are increasingly focused on cash preservation and tighter inventory management. These factors could affect the timing of customer orders and the overall level of demand for our products. Because it is extremely difficult to forecast the success or timing of a customer's product, and because our end markets are highly fragmented (we have over 13,000 PLD customers), our ability to forecast end customer demand is difficult. If we overestimate customer demand, we may allocate resources to manufacturing products that we may not be able to sell as quickly as estimated, if at all. As a result we could hold excess or obsolete inventory, which would reduce our profit margins and adversely affect our financial results.

The volatility and disruption of the capital and credit markets and adverse changes in the global economy may negatively impact our customers' business and their ability to access financing, which could adversely affect demand for our products. Our operating cash flows are highly dependent on the continued collection of receivables and our ability to sell our products. Declines in overall economic conditions could lead to deterioration in the quality of our receivables. In addition to reductions in sales and elevated risk associated with the collection of receivables, our profitability and cash flows may suffer during downturns because we may not be able to reduce costs at the same rate as our sales decline.

As further described below, we depend entirely on independent subcontractors to supply us with finished silicon wafers and to assemble, test and ship our semiconductor products. Uncertainties in the capital and credit market, however, may adversely affect the ability of our suppliers to obtain financing for operations. If our subcontractors' capital structures weaken, they may fail to satisfy our demand and our business could be materially disrupted.

If global economic and market conditions remain uncertain or persist, spread or deteriorate further, we could experience a material impact on our business, financial condition, results of operations or cash flows.

Our gross margins are subject to fluctuations due to many factors.

Our gross margins may fluctuate due to many factors, including:


•	Vertical market pricing mix


•	Changes in the mix of our prototyping and production-based business


•	Competitive pricing dynamics and customer mix


•	Various manufacturing cost variables including product yields, wafer prices, package and assembly costs, provisions for excess and obsolete inventory and absorption of manufacturing overhead

The majority of our sales are typically booked and shipped within the same quarter and forecasting our gross margins is difficult.

Our failure to compete successfully in the highly competitive semiconductor industry would adversely affect our financial results and business prospects.

The semiconductor industry, including the PLD market, is intensely competitive. Our ability to compete successfully in the semiconductor industry depends on our ability to provide our customers with solutions providing greater value than those offered by competing programmable logic vendors, such as Xilinx and Lattice, and other semiconductor companies that indirectly compete with us. Because we develop PLDs for applications that are presently served by ASIC, ASSP, FPGA, CPLD, DSP, and microprocessor/microcontroller vendors, we compete against these vendors. To the extent that our efforts to compete are not successful, our financial condition and results of operations could be materially adversely affected. Other competitors include manufacturers of:


•	high-density programmable logic products characterized by FPGA-type architectures


•	high-volume and low-cost FPGAs as programmable replacements for ASICs and ASSPs


•	ASICs and ASSPs with incremental amounts of embedded programmable logic


•	high-speed, low-density CPLDs


•	high-performance DSP devices


•	products with embedded multi-gigabit transceivers


•	other new or emerging programmable logic products

Many of these competitors have substantially more financial, technical and marketing resources than we do and have well-established market positions and solutions that have proven technically feasible and economically competitive over several decades. We may be unable to displace these vendors in the targeted applications and densities. Several companies have introduced products that compete with ours or have announced their intention to sell PLD products. The benefits of programmable logic have attracted a number of competitors to this segment. We recognize that different applications require different programmable technologies, and we are developing architectures, processes and products to meet these varying customer needs. Recognizing the increasing importance of standard software solutions, we have developed common software design tools that support the full range of our IC products. We believe that automation and ease of design are significant competitive factors in this segment.

The highly competitive environment of the semiconductor industry and the high costs associated with manufacturing technologies and developing marketable products have resulted in significant consolidation in the industry and are likely to lead to further consolidation. We may pursue business combination opportunities to improve our market share and the applications and products we can market. However, we may be outbid for the best assets. We also may become a target for a company looking to improve its competitive position. Such an occurrence may take place at any time with consequences that may not be predictable and that could have a materially adverse effect on our results of operations and financial condition.

A downturn in the communications equipment end market could cause a reduction in demand for our products and limit our ability to maintain revenue levels and operating results.

Approximately 43% of our net sales for 2011 was derived from customers participating in the Telecom and Wireless vertical market. In the past, a general weakening in demand for programmable logic products from customers in the communications end market has adversely affected our revenue. Any deterioration in the communications end market or reduction in capital spending to support this end market could lead to a reduction in demand for our products and could adversely affect our revenue and results of operations.

The length of our design-in and sales cycles could affect our ability to forecast future sales.

Our sales depend on our products being designed into end customers' products, and on those products being produced in volume. Our products are very complex, and the time from design-in to volume production ranges from six months to three years or more. From initial product design-in to volume production, many factors can affect the timing and/or volume of our sales. These factors include, but are not limited to, changes in the competitive position of our technology, the competitiveness of our end customers' products in the markets they serve, our customers' financial stability, end customer program delays and cancellations and our ability to ship products according to customer schedules.

Our business is characterized by a general decline in semiconductor product selling prices that may materially and adversely affect our profitability.

The selling prices of our products have decreased over time. We have offset the selling price decreases by reducing manufacturing costs, improving yields and increasing unit sales. However, our ongoing efforts may not be successful or may not keep pace with the anticipated, continued decline in product selling prices, which could ultimately reduce revenues and gross margins.

Because we depend on international sales for a majority of our total sales, we may be subject to political, economic and other conditions that could increase our operating expenses and disrupt our business.

Our operations outside of the United States are subject to risks that are inherent in conducting business under non-U.S. laws, regulations and customs. During 2011, sales outside of the U.S. and Canada constituted approximately 81% of our net sales, and we expect that international sales will continue to account for a significant portion of our net sales. Risks related to our foreign operations include:


•	Unfavorable economic, market, political and social conditions in a specific country or region


•	Fluctuation in foreign currency exchange rates


•	Adverse changes in tax laws


•	Increased freight costs


•	Interruptions in air transportation


•	Reduced protection for intellectual property rights in some countries


•	Longer receivable collection periods


•	Natural or man-made disasters in the countries or regions where we sell our products


•	Different labor regulations

We must comply with a variety of foreign laws and we experience risks associated with legislation and regulations for importing and exporting semiconductor products. In the future, the United States or other countries may impose quotas, duties, tariffs, taxes or other charges, restrictions or trade barriers for the import or export of our products.

We rely heavily on distributors to generate a significant portion of our sales and fulfill our customer orders. The failure of our distributors to perform as expected could materially reduce our future sales.

Worldwide sales through distributors accounted for 73% of our net sales during 2011. We rely on many distributors to help us create end customer demand, provide technical support and other value-added services to end customers, fill customer orders and stock our products. Our contracts with our distributors may be terminated by either party upon notice.

Our distributors are located all over the world and are of various sizes and financial conditions. Lower sales, lower earnings, debt downgrades, the inability to access capital markets and higher interest rates could potentially affect our distributors' operations.

We are highly dependent on certain distributors, in many locations across the world, particularly in North America.

During 2011, Arrow Electronics, Inc. and affiliates ("Arrow"), accounted for approximately 39% of net sales on a worldwide basis, while our next-largest distributor, Macnica, Inc. and its affiliates (“Macnica”), accounted for approximately 21% of net sales. As of December 31, 2011, accounts receivable from Arrow and Macnica individually accounted for 30% and 43%, respectively, of our total accounts receivable.

Our ability to add or replace distributors is limited.

We contract with distributors to perform two primary, yet distinct, functions that are difficult to replace:


•	Distributors provide logistics support, such as order entry, credit, forecasting, inventory management and shipment of product, to end customers. The process of integrating systems to allow for electronic data interchange is complex and can be time consuming.


•	Distributors create demand for our products at the engineering level. This mandates the training of an extended distributor sales force, as well as hiring and training specialized applications engineers skilled in promoting and servicing products at the engineering level.

In addition, our distributors' expertise in the determination and stocking of acceptable inventory levels may not be easily transferable to a new distributor. End customers may be hesitant to accept the addition or replacement of a distributor.

We depend entirely on TSMC to supply us with finished silicon wafers. TSMC's failure to satisfy our demand could materially disrupt our business.

Our silicon wafers are produced by TSMC in its manufacturing facilities located primarily in Taiwan and the U.S. Silicon wafer production facilities have a fixed capacity that is allocated solely by our vendors and beyond our direct control. We have no formalized long-term supply or allocation commitments from TSMC. Our operations would be disrupted if TSMC ended its relationship with us and we were unable to arrange a satisfactory and cost-effective alternative to quickly fulfill customer orders.

To ensure continued wafer supply, we may establish other wafer supply sources as these arrangements become economically advantageous or technically necessary. However, only a few foundry vendors have the capability to manufacture our most advanced products. If we engage alternative supply sources, we may encounter start-up difficulties and incur additional costs. In addition, shipments could be significantly delayed while these sources are qualified for volume production.

Furthermore, because we rely on a third-party foundry vendor, we have little or no direct control over production costs, delivery schedules and wafer quality. We also face increased exposure to potential misappropriation of our intellectual property.

Wafer shortages and/or increased wafer and assembly material costs could lower our gross margins, reduce our sales or otherwise materially disrupt our business.

If market demand for silicon wafers or assembly material suddenly exceeds market supply, our supply of silicon wafers or assembly material could quickly become limited. A shortage in manufacturing capacity could hinder our ability to meet product demand. Moreover, silicon wafers constitute more than half of our product cost. If we are unable to purchase wafers at favorable prices, our gross margins will be adversely affected.

Product manufacturing is complex, and we may not achieve the necessary yields or product reliability that our business requires.

Manufacturing our products is a highly complex and precise process, requiring production in a tightly controlled environment. We depend not only on sufficient foundry manufacturing capacity and wafer prices, but also on good production yields (the number of good die per wafer) and timely wafer delivery to meet customer demand and maintain profit margins. Wafer production yields depend on a wide variety of factors including the level of contaminants in the manufacturing environment, impurities in the materials used and the performance of personnel and equipment. As a result, we may experience problems with achieving acceptable production yields and timely delivery from our foundry vendor.

Difficulties in production yields can often occur when we begin new product production, when we transition to new processes or when our wafer supplier, TSMC, moves production of a product from one manufacturing plant to another or manufactures the same product at multiple factories. As a result of manufacturing defects, TSMC has also occasionally scrapped wafers, resulting in longer manufacturing lead times. Further, production throughput times vary considerably among the various factories used by our wafer supplier, and we may occasionally experience production delays. These difficulties and delays can potentially cause significantly higher costs and lower product availability.

We depend on independent subcontractors to assemble, test and ship our semiconductor products. The failure of these subcontractors to satisfy our demand could materially disrupt our business.

Because we rely on independent subcontractors to assemble, test and ship our semiconductor products and to provide package piece parts, we cannot directly control our product delivery schedules or quality levels. We depend on sufficient subcontractor assembly and test capacities, both in raw materials and services, to meet the demand for our products. Our future success also depends on the financial viability of our independent subcontractors. If market demand for subcontractor material and services exceeds available supply or if the subcontractors' capital structures weaken, we may experience product shortages, quality

assurance problems and/or increased manufacturing costs.

Conditions outside the control of our independent subcontractors and distributors may impact their business operations and thereby adversely interrupt our manufacturing and sales processes.

The economic, market, social and political situations in countries where certain independent subcontractors and distributors are located are unpredictable and could have a significant impact on our business if we were unable to obtain or distribute product in a timely manner. Market and political conditions (including currency fluctuation, terrorism, political strife, war and labor disruption), natural or man-made disasters, adverse changes in tax laws, tariffs, import or export quotas, power and water shortages or interruption in air transportation in areas where our independent subcontractors and distributors are located also could have a severe negative impact on our operating capabilities.

Our failure to define, develop and manufacture technologically advanced products would adversely affect the success and growth of our company.

We operate in a dynamic market characterized by rapid technological change. Our products are manufactured using a highly complex and precise process, requiring production in a tightly controlled environment. Our current product development efforts focus on developing new PLDs, related development software and hardware and advanced semiconductor wafer fabrication processes. Our development efforts may impact the timely introduction of competitive new products or product enhancements. Additionally, we may not be successful in developing new products or using and converting established products to new and more advanced process technologies. For example, our current generation product families, including the Stratix V (including E, GX, GS and GT) family, are manufactured on a 28-nanometer process technology, but our next-generation product families will be manufactured on smaller circuit geometries that we have not used before. The use of advanced process technology has technological risks and start-up difficulties that can adversely affect research and development spending, yields, product costs and product delivery timeliness.

We rely on information technology systems - failure of these systems to function properly, or unauthorized access to our systems, could result in significant business disruption.

We rely on information technology ("IT") systems to manage our business. We evaluate our business processes and our IT systems on an ongoing basis and make periodic enhancements to our business processes and the functionality of our IT systems. In connection with these enhancements, we modify our processes and controls to ensure continued reliability and integrity of our business processes and related IT systems. Any delay in the implementation of, or disruption in the transition to, new or enhanced processes, systems or controls, could adversely affect our ability to generate accurate financial and management information in a timely manner. These systems are also susceptible to power and telecommunication disruptions and other system failures. Failure of our IT systems or difficulties in managing them could result in business disruption.

We also may face the risk of unauthorized access to our IT systems through a security breach or attack. We strive to identify and investigate any such security incidents and prevent their recurrence. However, in certain cases, there may be undetected incidents or the impact of identified incidents may not be fully understood. Our business could be significantly disrupted and we could be subject to third party claims in the event of a significant security breach.

Any prolonged disruption to our global communications infrastructure could impair our ability to plan production activity and respond to customer demand.

Demand for our products is highly volatile, especially at the detailed ordering code level. To achieve short delivery lead times and superior levels of customer service while maintaining low levels of inventory, we constantly adjust our manufacturing subcontractors' production schedules. We develop and adjust these schedules based on end-customer demand as communicated by our distributors and based on our inventory levels, manufacturing cycle times, component lead times, and projected production yields. We combine and distribute all of this information electronically over a complex global communications network. Our ability to estimate demand and to adjust our production schedules is highly dependent on this network; we have no manual back-up. A prolonged disruption or service failure in a portion of this network would impair our ability to plan production activity and respond to demand.

Product quality problems could lead to reduced revenue, gross margins and net income.

We produce highly complex hardware and software products that incorporate leading-edge technology. Our pre-shipment

testing programs may not detect all defects. Because our product warranties against materials and workmanship defects and non-conformance to our specifications are for varying lengths of time, we have occasionally been required to replace components or refund the purchase price paid due to product defects. If the costs for customer or warranty claims increase significantly compared with our historical experience, our revenue, gross margins and net income may be adversely affected. For example, if we cannot fix a product defect in a timely manner, we may incur product reengineering expenses, increased inventory costs or damage to our reputation, any of which could materially affect our revenue, gross margins and net income.

We may be subject to product liability claims.

Our devices are used in automotive, military, aerospace, avionics, medical equipment and other systems where system failure could cause damage to property or people. We may receive product liability claims if our devices cause system failures. Based on our historical experience, we believe that the risk of exposure to product liability claims is currently low, but could be higher if either the sales volume in these applications or the frequency of system failures caused by our devices increases.

Our business is subject to the risks of earthquakes and other catastrophic events.

Our corporate headquarters in San Jose, California is located near major earthquake faults. Some of our international facilities and those of our key suppliers, including TSMC, which produces our silicon wafers, are also located near major earthquake faults. Any catastrophic event, such as an earthquake or other natural disaster, could make it difficult for Altera and our independent subcontractors to meet product design deadlines, maintain our records, pay our suppliers, or manufacture or ship our products. Any catastrophic event could also affect our customers or potential customers which could reduce or delay orders and ultimately decrease our revenue.

As we carry only limited insurance coverage, any incurred liability resulting from uncovered claims could adversely affect our financial condition and operating results.

Our insurance policies may not be adequate to fully offset losses from covered incidents, and we do not have coverage for certain losses. We believe our existing insurance coverage is consistent with common practice and economic and availability considerations. If our insurance coverage is inadequate to protect us against unforeseen catastrophic losses, any uncovered losses could adversely affect our financial condition and operating results.

Legislative action could materially and adversely affect our effective tax rate.

Legislative action may be taken by the U.S. Congress which, if ultimately enacted, would adversely affect our effective tax rate and/or require us to take further action, at potentially significant expense, to seek to preserve our effective tax rate. The current administration and Congress have announced proposals for new U.S. tax legislation that, if adopted, could substantially modify the rules governing the U.S. taxation of certain non-U.S. affiliates. The potential changes include, but are not limited to, curbing the deferral of U.S. taxation of certain foreign earnings and limiting the ability to use foreign tax credits.

We cannot predict the outcome of any specific legislative proposals. However, any of these changes could have a material adverse effect on our profitability. We cannot give any assurance as to what our effective tax rate will be because of, among other things, uncertainty regarding the tax policies of the jurisdictions where we operate, including jurisdictions outside the U.S. As a result, our actual effective tax rate may vary from our expectations and that variance may be material.

The failure of our intellectual property rights to provide meaningful protection from our competitors could harm our competitive position.

We rely on patent, trademark, trade secret, copyright and mask work laws to protect our intellectual property, proprietary information and technology rights. As of December 31, 2011, we owned more than 2,460 U.S. patents and 335 foreign patents, and had more than 1,160 patents applications pending worldwide. Our patents and patent applications may not protect us from our competition, which may be able to circumvent our patents or develop new patentable technologies that displace our products. In addition, other parties, including our former employees or consultants, may try to disclose, obtain or use our proprietary information or technologies without our authorization despite our best efforts at prevention. If other companies obtain this information or develop similar information or technologies, they may develop products that compete against ours.

Moreover, the laws of certain countries where we sell, manufacture or distribute products may not protect our products and intellectual property rights to the same extent as U.S. laws. Policing the unauthorized use of our products is difficult and costly

and could divert the efforts of our technical and management personnel. Even if we spend significant resources and efforts to protect our intellectual property, we may be unable to prevent misappropriation of our technology. If others use our proprietary rights, it could materially harm our business and require expensive litigation to enforce our intellectual property rights.

Intellectual property infringement claims could adversely affect our ability to manufacture and market our products.

We occasionally receive inquiries about possible patent infringements that may require us to obtain licenses relating to our current or future products. We may be unable to obtain licenses on reasonable terms, or the license agreements may have set durations or may not provide complete protection against infringement claims involving all of our current or future products. If we are sued for patent infringement, the costs and outcome of litigation will be unpredictable and may have a negative impact on our financial results. Intellectual property claims, regardless of their merit, can result in costly litigation and divert the efforts of our technical and management personnel. Legal proceedings are also unpredictable and may be affected by events outside of our control. If our defense against intellectual property infringement claims is unsuccessful, we may be required to pay significant monetary damages or be subject to an injunction against the manufacture and sale of one or more of our product families. Alternatively, we could be required to spend significant resources to develop non-infringing technology, the success of which may be uncertain. Intellectual property litigation may have an adverse effect on our financial position, results of operations and cash flows.

ITEM 1B. UNRESOLVED STAFF COMMENTS.

None.

ITEM 2. PROPERTIES.

Our headquarters facility currently consists of four interconnected buildings totaling approximately 500,000 square feet, located on approximately 25 acres of land that we own in San Jose, California. Design, research, marketing, administrative, and limited manufacturing activities are performed in this facility. We also have a 465,000-square-foot design, test engineering, operation and administrative facility in Penang, Malaysia, located on land leased on a long-term basis. We lease our domestic and international offices, including our technology centers in the United Kingdom, Canada and the United States. We believe that our facilities are adequate for our current and foreseeable future needs.

ITEM 3. LEGAL PROCEEDINGS.

We were named as a party to a lawsuit concerning our historical stock option practices and related accounting and reporting.

In May and July 2006, we were notified that three shareholder derivative lawsuits had been filed in the Superior Court of the State of California, County of Santa Clara, by persons identifying themselves as Altera shareholders and purporting to act on behalf of Altera, naming Altera Corporation as a nominal defendant and naming some of our current and former officers and directors as defendants. On July 12, 2006, one of these derivative actions was voluntarily dismissed by the plaintiff shareholder. The remaining two derivative lawsuits pending in Santa Clara Superior Court were consolidated into a single action on September 5, 2006. Plaintiffs filed a second amended consolidated complaint on December 15, 2006. On January 30, 2007, Altera and the defendants filed a motion to stay this action pending resolution of the federal derivative action (discussed below). On February 11, 2009, one of the remaining derivative plaintiffs voluntarily dismissed his derivative claims and, on March 20, 2009, the other remaining derivative plaintiff filed a third amended complaint. In June 2009, Altera and the defendants demurred to the third amended complaint. After the court issued a tentative ruling in favor of Altera, the parties agreed to stay the action in order to allow plaintiff to serve a demand on Altera's board of directors. The plaintiff served the demand on November 4, 2009. In the first quarter of 2010, the board of directors completed its review of the demand and decided to reject plantiff's demand. On June 1, 2010, the plaintiff filed a fourth amended complaint, alleging that the board of director's decision to reject plaintiff's demand was wrongful. On July 15, 2010, Altera demurred to the fourth amended complaint. In October 2010, the court dismissed plaintiff's fourth amended complaint and granted plaintiff leave to file a fifth amended complaint. On November 4, 2010, the plaintiff filed a fifth amended complaint, alleging that Altera's board of directors wrongfully refused his demand. On December 10, 2010, Altera, joined by the individual defendants, demurred to the fifth amended complaint. On March 23, 2011, the plaintiff entered into a stipulation agreeing to voluntarily dismiss the action with prejudice. On April 21, 2011, the court entered an order dismissing the action with prejudice and set a dismissal review hearing for June 24, 2011. The April 2011 order dismissing the action with prejudice was finalized at the June 2011 dismissal review hearing.

Plaintiff asserted claims against the individual defendants for breach of fiduciary duty, waste of corporate assets, unjust enrichment, violations of California Corporation Code section 25402, breach of fiduciary duty for insider selling and misappropriation of information, and deceit. Plaintiff's claims concerned the granting of stock options by Altera between 1994 and 2001 and the alleged filing of false and misleading financial statements between 1994 and 2006. All of these claims were asserted derivatively on behalf of Altera. Plaintiff sought, among other relief, an indeterminate amount of damages from the individual defendants and a judgment directing Altera to reform its corporate governance practices.

During the months of May, June, and July 2006, four other derivative lawsuits were filed by purported Altera shareholders, on behalf of Altera, in the United States District Court for the Northern District of California. On August 8, 2006, these actions were consolidated, and the plaintiffs filed a consolidated complaint on November 30, 2006. On September 15, 2008, the plaintiffs voluntarily agreed to dismiss the case. On September 18, 2008, the court entered an order dismissing the case.

On December 8, 2010, Intellectual Ventures I LLC and Intellectual Ventures II LLC (“Intellectual Ventures”) filed a lawsuit in the United States District Court for the District of Delaware against Altera, Microsemi Corporation, and Lattice Semiconductor Corporation alleging that Altera is infringing five patents. The complaint requests unspecified monetary damages including enhanced damages for willful infringement. In February 2011, Intellectual Ventures filed a First Amended Complaint adding Xilinx, Inc. as a defendant. In March 2011, Altera answered the complaint and asserted counterclaims against Intellectual Ventures for non-infringement and invalidity of the asserted patents. The defendants filed motions in the District of Delaware to transfer the case to the United States District Court for the Northern District of California and to stay the action pending re-examination proceedings in the United States Patent and Trademark Office. Intellectual Ventures opposed the motions. In January 2012, the United States District Court for the District of Delaware denied the defendants' motion to transfer the case to the Northern District of California, and on February 15, 2012, the court denied the defendants' motion to stay. Because the case is at a very early stage, it is not possible for us to determine whether there is a reasonable possibility that a loss has been incurred nor can we estimate the range of potential loss.

On June 24, 2011, Altera filed an action in the United States District Court for the Northern District of California against LSI Corporation and Agere Systems, Inc. (collectively “LSI”). The action alleges that LSI infringes various patents owned by Altera and also seeks a declaratory judgment that Altera does not infringe various patents owned by LSI and/or Agere (the “LSI patents”) and that the LSI patents are invalid. In September 2011, LSI answered the complaint and asserted counterclaims of patent infringement against Altera. In November 2011, the parties entered into a settlement and patent license agreement, dismissing all claims against each other.

ITEM 4. MINE SAFETY DISCLOSURES.

Not applicable.

PART II

ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY, RELATED STOCKHOLDER MATTERS, AND ISSUER PURCHASES OF EQUITY SECURITIES.

Our common stock trades on the NASDAQ Global Select Market ("NASDAQ") under the symbol ALTR. As of January 27, 2012, there were approximately 378 stockholders of record. The majority of our shares are held by brokers and other institutions on behalf of approximately 77,795 stockholders as of January 27, 2012.

The closing price of our common stock on January 27, 2012 was $40.23 per share as reported by NASDAQ. The following table sets forth, for the periods indicated, the high and low closing sale prices for our common stock as reported by NASDAQ:



	2011		2010
	High	Low	High	Low
First Quarter	$44.41	$35.90	$25.66	$21.16
Second Quarter	$49.38	$41.69	$26.75	$22.85
Third Quarter	$48.12	$31.53	$30.62	$24.65
Fourth Quarter	$40.29	$30.87	$37.99	$28.95

Dividends Declared Per Common Share

The following table presents the quarterly dividends declared on our common stock for the periods indicated:



	2011	2010
First Quarter	$0.06	$0.05
Second Quarter	$0.06	$0.05
Third Quarter	$0.08	$0.06
Fourth Quarter	$0.08	$0.06

On January 23, 2012, our board of directors declared a cash dividend of $0.08 per common share payable on March 1, 2012 to stockholders of record on February 10, 2012. We periodically review our policy regarding share repurchases and cash dividends.

Equity Compensation Plan Information

Information regarding our equity compensation plans, including both stockholder approved plans and non-stockholder approved plans, will be contained in our Proxy Statement for our 2012 Annual Meeting of Stockholders under the caption “Equity Compensation Plan Information” and is incorporated by reference into this report.

Issuer Purchases of Equity Securities

No shares were repurchased during the fourth quarter of 2011. We repurchase shares under our stock purchase program announced on July 15, 1996, which has no specified expiration. Our board of directors has authorized 193.0 million shares for repurchase and we have repurchased a total of 183.1 million shares of our common stock. No existing repurchase plans or programs have expired, nor have we decided to terminate any repurchase plans or programs prior to expiration. We plan to continue making purchases under our stock purchase program. See Note 12 - Stockholders' Equity to our consolidated financial statements for additional information.

We have agreements in place pursuant to SEC Rule 10b5-1 under which we authorize third-party brokers to purchase shares on our behalf during our normal blackout periods according to predetermined trading instructions. In addition, we repurchase shares of our common stock under the guidelines of SEC Rule 10b-18.

Company Performance

The following graph shows a comparison, since December 29, 2006 of cumulative total return for Altera, the Standard & Poor's 500 Index, and the Standard & Poor's 500 Semiconductors Sub-Industry Index.

COMPARISON OF CUMULATIVE TOTAL RETURN*

The graph assumes that $100 was invested in each of our common stock, Standard & Poor's 500 Index and Standard & Poor's 500 Semiconductors Sub-Industry Index on January 3, 2007, the first trading day subsequent to December 29, 2006 and that all dividends were reinvested.


*	Total return is based on historical results and is not intended to indicate future performance. Total return assumes reinvestment of dividends for Altera common stock, Standard & Poor's 500 Index and Standard & Poor's 500 Semiconductors Sub-Industry Index.

ITEM 6. SELECTED FINANCIAL DATA.

The following selected consolidated financial data should be read in conjunction with “Management's Discussion and Analysis of Financial Condition and Results of Operations” and our consolidated financial statements and related notes thereto.



(In thousands, except per share amounts)	2011					2010					2009					2008					2007
Statements of Income Data
Net sales	$	2,064,475				$	1,954,426				$	1,195,413				$	1,367,224				$	1,263,548
Cost of sales	610,329					566,942					396,584					449,750					447,969
Gross margin	1,454,146					1,387,484					798,829					917,474					815,579
Research and development expense	325,733					264,649					260,208					257,717					261,786
Selling, general, and administrative expense	279,217					254,495					234,074					255,391					272,141
Compensation (benefit) expense - deferred compensation plan	(1,964		)			6,839					11,776					(18,106		)			6,699
Loss (gain) on deferred compensation plan securities	1,964					(6,839		)			(11,776		)			18,106					(6,699		)
Interest income and other	(3,526		)			(3,300		)			(6,083		)			(30,300		)			(57,681		)
Interest expense	3,730					3,843					5,092					15,492					1,705
Income before income taxes	848,992					867,827					305,538					419,174					337,628
Income tax expense	78,281					84,943					54,476					59,523					47,605
Net income	$	770,711				$	782,884				$	251,062				$	359,651				$	290,023

Net income per share:
Basic	$	2.39				$	2.55				$	0.85				$	1.20				$	0.84
Diluted	$	2.35				$	2.49				$	0.84				$	1.18				$	0.82

Shares used in computing per share amounts:
Basic	321,892					307,302					294,493					300,951					345,382
Diluted	327,606					313,912					297,180					304,604					351,906

Cash dividends declared per common share	$	0.28				$	0.22				$	0.20				$	0.19				$	0.12

Balance Sheet Data
Working capital	$	2,958,592				$	2,834,523				$	1,551,809				$	1,241,139				$	1,044,430
Total assets	$	4,282,268				$	3,759,837				$	2,293,231				$	1,879,907				$	1,769,918
Credit facility	$	—		(1	)	$	500,000				$	500,000				$	500,000				$	250,000
Other non-current liabilities	$	272,153		(2	)	$	239,698		(2	)	$	217,934		(2	)	$	194,008		(2	)	$	168,810
Stockholders' equity	$	2,993,896				$	2,323,652				$	1,085,336				$	799,877				$	861,450
Book value per share	$	9.30				$	7.27				$	3.66				$	2.73				$	2.74


(1)	The credit facility remains outstanding, is presented in current liabilities in our consolidated balance sheets as of December 31, 2011 and is reflected in our net working capital number presented above.


(2)	Reflects the classification of certain income taxes payable as non-current based on the FASB guidance on accounting for uncertainty in income taxes. See Note 14 - Income Taxes to our consolidated financial statements for additional information.

ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS.

The following discussion and analysis should be read in conjunction with our consolidated financial statements and related notes thereto included in Item 8 and the Risk Factors included in Item 1A of this Annual Report on Form 10-K.

Executive Overview

Company and Market Overview

We are a global semiconductor company, serving over 13,000 customers within the Telecom and Wireless, Industrial Automation, Military and Automotive, Networking, Computer and Storage, and Other vertical markets. The Other vertical market includes sub-markets of broadcast, consumer, medical and test. We design, manufacture, and market a variety of products:


•	Programmable logic devices (“PLDs”), which consist of field-programmable gate arrays (“FPGAs”) and complex programmable logic devices (“CPLDs”), are standard semiconductor integrated circuits, or chips, that our customers program to perform desired logic functions in their electronic systems.


•	HardCopy application-specific integrated circuit (“ASIC”) devices transition customer designs from high-density FPGAs to low-cost non-programmable devices for volume production.


•	Pre-defined design building blocks, known as intellectual property (“IP”) cores, can be licensed by customers to easily implement standard functions in their PLD designs.


•	Proprietary development software, which operates on personal computers and engineering workstations, is used by customers to develop, compile, and verify their designs, and then program their designs into our PLDs.

In 2011, sales of PLDs generated 91% of our net sales, with FPGA and CPLD sales comprising approximately 81% and 10% of our net sales, respectively. The remainder of our net sales is comprised of our HardCopy devices and configuration devices used in conjunction with our FPGAs, as well as licensing of IP cores and proprietary development tools.

Market Opportunity

Based on publicly available data and information derived from Gartner Dataquest, an independent research firm, we estimate that the PLD market was approximately $4.9 billion in 2011. We also estimate that the combined ASIC and ASSP market in 2011 was approximately $100 billion, comprised of the ASIC market at approximately $22 billion and the ASSP market at approximately $78 billion. Due to the low priced nature of some very high volume ASIC and ASSP applications, including mobile phones and certain consumer applications such as PC-related equipment, video games and portable media applications, we do not believe that the entire ASIC and ASSP market is available for displacement by PLDs. As such, we estimate that the PLD accessible ASIC and ASSP market was approximately $48 billion in 2011 ($12 billion in accessible ASICs and $36 billion in accessible ASSPs) and that this represents significant PLD growth potential.

In addition to the accessible portion of the ASIC and ASSP market of $48 billion in 2011, we believe our Embedded Initiative offers an additional available market of approximately $9 billion. By investing in and developing software, hard and soft IP, and licensed cores for microprocessors and memory, as well as application-targeted FPGAs, we believe that we can capture a higher percentage of the semiconductor bill of materials in an embedded system.

With the increasing tendency towards silicon convergence, the impact of "tipping point" economics, and the ever-increasing need for programmability within an electronic system, we believe that customers will increasingly turn to PLD suppliers for not only logic functionality, but also system integration in both prototyping and production quantities. With a combined $57 billion ASIC, ASSP and embedded market replacement opportunity, our goal is that, over time, the average growth rate of our revenue can double that of the total semiconductor industry.

While we have had some degree of success winning customer designs over ASICs, ASSPs, embedded processors and microcontrollers, the rate at which customers will adopt the use of PLDs is unclear. Technological issues, including those related to power consumption, performance specifications and design methodology, may inhibit some customers from the broad adoption of PLDs. Despite having success in winning new designs and a higher growth rate of PLDs relative to ASICs, ASSPs, embedded processors and microcontrollers in recent years, our share gains relative to these alternatives may take many years to become significant due to the small size of the PLD market when compared to the combined accessible revenue of ASICs, ASSPs, embedded processors and microcontrollers. This is compounded by the fact that it may take a long period of time for

revenue from new designs to become meaningful when compared with the existing legacy revenue stream.

Driving Operational Excellence

Since the PLD market emerged in the 1980s, the financial business models of the leading PLD suppliers have generally been favorable when compared to most other semiconductor companies. Fabless strategies, high barriers to entry, and proprietary architectures have contributed to strong financial results for PLD suppliers.

We regularly engage in a strategic review of our business to improve operations and financial returns. We are focused on maximizing return on invested capital by pursuing greater efficiencies in all aspects of our operations while seeking balance with our commitment to continued investment in advanced technology for the development of new products. In recent years, we have increased our focus on enhancing our business model by simplifying our business processes while also growing PLD market share.

Our ability to maintain investment in the research and development of future products, has been aided by our early and ongoing cost savings initiatives, and is a vital factor for our future sales and earnings growth. In addition, our prior work in analyzing business processes has not only allowed us to effectively identify and implement simplification and cost reduction initiatives, but the concept of “workflow efficiency” has become a valued aspect of our business culture.

Leveraging Our Global Structure

We believe that we have opportunities to further expand our position outside of the U.S. Our organization and management structure integrates our U.S. and non-U.S. operations and provides our management team with a global perspective on our markets. We believe that this infrastructure provides opportunities to develop and commercialize new products that meet global needs and can be rapidly launched in multiple markets. Our global organizational focus should allow us to continue to grow outside of the U.S. faster than within the U.S.

Competing for Design Wins

We compete with other PLD vendors to displace other semiconductor alternatives and for market share within the PLD market. Competition between PLD vendors is most intense in the “design-win” phase of the customer's design, when customers select products for use in the customer's electronic system. Customers often prefer to use the same PLD vendor in successive product generations. This "incumbency advantage" is driven by a customer's investment in building expertise with the PLD vendor's software and the re-use of portions of a design from prior generations. In addition, because each PLD vendor's products are proprietary, the cost to switch PLDs after a system has been designed and prototyped is very high. Therefore, a design win can provide the PLD vendor with a profitable revenue stream through the life of the customer's program.

From the time a design win is secured, it can be two or more years before a customer starts volume production of its system. Typically, the customer selects the PLD vendor relatively early in a customer's design process, but it may take several years to complete system design, build prototypes, sample the marketplace for customer acceptance, make modifications and manufacture in volume. Thus, there is a delay between developing a competitive advantage and experiencing a shift in the PLD market, meaning that market share is a lagging indicator of relative competitive strength. Because it is extremely difficult to forecast the success and timing of customer programs, and because the end markets are highly fragmented (we have over 13,000 PLD customers), it is difficult even for PLD vendors to gauge their own competitive strength in winning designs at a particular point in time.

Developing Competitive Products

A PLD vendor's ability to secure design wins and to maintain or increase market share is highly dependent on the cost and quality of its products, its ability to provide tailored architectures, and the effectiveness and reliability of its proprietary development software. Development software, working in tandem with device logic architecture and features, creates the functionality desired by the customer. We develop our software in parallel with our devices, and there are schedule and integration risks between the two processes. If we fail to create adequate software to support our new devices as they are introduced, we weaken our competitive position, which can have long-lasting effects if customers switch to competing solutions and become less familiar and less skilled with our software.

We focus the majority of our research and development resources on next-generation FPGAs that are "silicon convergence-friendly." Increasing our FPGA market share and the further success of our tailored architectural approach in our new FPGA product families is important to our long-term growth and profitability. Due to the higher integration density and lower cost per

function, the FPGA market has outgrown the CPLD market in recent years, and industry participants and observers believe this trend will continue. Since the initial introduction of our Stratix and Cyclone FPGA families in 2002, we have introduced several more FPGA families in the Stratix, Cyclone and Arria series of products. As a result of these product introductions, we estimate, based on publicly available data and with information derived from Gartner Dataquest, that our market share has increased as follows:

Complementing our Stratix FPGAs is our HardCopy family of ASICs. The availability of a HardCopy conversion path for high-density FPGA designs is a competitive advantage. We first shipped HardCopy devices in 2001, offering customers low-cost, non-programmable production devices that use our highest density FPGAs as an integrated development vehicle. HardCopy devices are targeted specifically at those applications and customers that have used PLDs for prototyping and development and traditional cell-based ASICs from other vendors for their volume production needs.

We have improved our CPLD offering by introducing the MAX II family in 2004, the MAX IIZ family in 2007 and the MAX V family in 2010. MAX V CPLDs offer pricing and features that we believe are competitively attractive, with cost, performance, power consumption, and density that are superior to our previous offerings.

An FPGA family typically reaches peak sales four to five years after initial product shipment. As a result, the Stratix III and Cyclone III families, introduced in 2007, comprised approximately 27% of our net sales in 2011, and may be at or near peak sales. We believe that the products we introduced from 2008 to 2011 have yet to reach peak sales. To improve or even sustain our growth rate, we must successfully introduce successor generations of devices. The degree to which other PLD vendors improve the competitiveness and execution of their products, including the ability to support silicon convergence, may impair our ability to improve our growth rate.

Within the next several quarters, we plan to ship newer FPGA families using more advanced production techniques that will further improve product performance and lower cost. Our foundry partner, Taiwan Semiconductor Manufacturing Company (“TSMC”), will manufacture these die using production processes that are new to the industry. Given the extreme complexity of semiconductor fabrication, TSMC may encounter difficulties that could delay our product launch or limit supply so that we would be unable to meet customer commitments. We may discover manufacturing errors after we begin shipping, which could harm customer relations and cause us to incur additional unforeseen costs. Simultaneous introduction of new PLD architectures and ramp of new technology processes are inherently risky. Diagnosing failures, identifying root causes, and implementing corrective actions in a production wafer fabrication facility are expensive and time-consuming. We may not successfully commercialize our new products, or our new products may not enable us to maintain or increase market share. Some of our competitive offerings may be offered later than the competition, and it is possible that our competitive offerings will be less effective, thus weakening our market share.

It is also possible that our primary competitor may have secured design wins that, when they enter production, will reverse some of our recent market share gains. Our main competitor is larger in size with more sales and research and development resources, and we may not enjoy the same success that we saw with previous FPGA generations.

Critical Accounting Estimates

The preparation of our consolidated financial statements and related disclosures in conformity with accounting principles generally accepted in the United States of America (“U.S. GAAP”) requires our management to make certain judgments and estimates that affect the amounts reported in our consolidated financial statements. Our management believes that we consistently apply these judgments and estimates and the consolidated financial statements fairly represent all periods presented. However, any differences between these judgments and estimates and actual results could have a material impact on our consolidated statements of income and financial condition. Critical accounting estimates, as defined by the Securities and Exchange Commission (“SEC”), are those that are most important to the portrayal of our financial condition and results of operations and require our management's most difficult and subjective judgments and estimates of matters that are inherently uncertain. Our critical accounting estimates include those regarding (1) revenue recognition; (2) valuation of inventories; and (3) income taxes.

Revenue Recognition

We sell the majority of our products to distributors for subsequent resale to OEMs or their subcontract manufacturers. In most cases, sales to distributors are made under agreements allowing for subsequent price adjustments and returns. We defer recognition of revenue and costs until the products are resold by the distributor. Our revenue reporting is highly dependent on receiving pertinent and accurate data from our distributors in a timely fashion. Distributors provide us with periodic data regarding the product, price, quantity and end customer when products are resold as well as the quantities of our products they still have in stock. We maintain system controls to validate distributor data and to verify that reported data is accurate. At times, we must use estimates and apply judgments to reconcile distributors' reported inventories to their activities. This reconciliation process requires us to estimate the amount of in-transit shipments (net of in-transit returns) to our distributors. In-transit days can significantly vary among geographies and individual distributors. We also apply judgment when estimating the total value of price concessions earned by our distributors but not claimed by the end of the reporting period. This is because there is a time lag between the price concessions earned and claimed by the distributors for any underlying resale of products. Any error in our judgment could lead to inaccurate reporting of our net sales, deferred income and allowances on sales to distributors, and net income.

Valuation of Inventories

Inventories are recorded at the lower of cost determined on a first-in-first-out basis (approximated by standard cost) or market. We routinely compare our inventory against projected demand and record provisions for excess and obsolete inventories as necessary. We establish provisions for inventory for technological obsolescence or if inventory levels on hand are in excess of projected customer demand. Such provisions result in a write-down of inventory to net realizable value and a charge to cost of goods sold. Historically, it has been difficult to forecast customer demand. Actual demand may materially differ from our projected demand, and this difference could have a material impact on our gross margin and inventory balances based on additional provisions for excess or obsolete inventory or a benefit from inventory previously written down. Many of the orders we receive from our customers and distributors request delivery of product on relatively short notice and with lead times less than our manufacturing cycle time. In order to provide competitive delivery times to our customers, we build and stock a certain amount of inventory in anticipation of customer demand that may not materialize. Moreover, as is common in the semiconductor industry, we generally allow customers to cancel orders with minimal advance notice. Thus, even product built to satisfy specific customer orders may not ultimately be required to fulfill customer demand.

Income Taxes

We establish a tax provision for the anticipated tax consequences of the reported results of operations. Deferred tax assets and liabilities are recognized for the expected future tax consequences of temporary differences between the financial reporting and tax basis of assets and liabilities, and for operating losses and tax carryforwards. We record valuation allowances, when necessary, to reduce our deferred tax assets to the amount that management estimates is more likely than not to be realized. If, in the future, we determine that we are not likely to realize all or part of our net deferred tax assets, an adjustment to the deferred tax asset valuation allowance would be recorded as a charge to earnings in the period such determination is made.

We measure and recognize uncertain tax positions in accordance with U.S. GAAP, whereby we only recognize the tax benefit from an uncertain tax position if it is more likely than not that the tax position will be sustained on examination by the taxing authorities, based on the merits of the position.

The calculation of our tax liabilities involves the inherent uncertainty associated with the application of U.S. GAAP and complex tax laws. We are subject to examination by various taxing authorities. We believe we have adequately provided in our financial statements for additional taxes that we estimate may be required to be paid as a result of such examinations. If the payment ultimately proves to be unnecessary, the reversal of the tax liabilities would result in tax benefits being recognized in the period we determine the liabilities are no longer necessary. If an ultimate tax assessment exceeds our estimate of tax liabilities, an additional charge to expense will result.

Results of Operations

Results of operations expressed as a percentage of net sales were as follows:



	2011		2010		2009
Net sales	100.0	%	100.0	%	100.0	%
Cost of sales	29.6	%	29.0	%	33.2	%
Gross margin	70.4	%	71.0	%	66.8	%
Research and development expense	15.8	%	13.5	%	21.8	%
Selling, general, and administrative expense	13.5	%	13.0	%	19.6	%
Compensation (benefit) expense - deferred compensation plan	(0.1	)%	0.3	%	1.0	%
Loss (gain) on deferred compensation plan securities	0.1	%	(0.3	)%	(1.0	)%
Interest income and other	(0.2	)%	(0.2	)%	(0.5	)%
Interest expense	0.2	%	0.2	%	0.4	%
Income tax expense	3.8	%	4.3	%	4.6	%
Net income	37.3	%	40.1	%	21.0	%

Sales Overview

Net sales were $2.06 billion in 2011, $1.95 billion in 2010 and $1.20 billion in 2009. Net sales increased by 6% in 2011 from 2010. The Net sales increase in 2011 was primarily driven by strong growth in sales of our New and Mainstream Products. With design incumbency from our 40-nanometer product success, our momentum continues in 28-nanometer. Our FPGA market share once again improved. We continue to see evidence of a “tipping point” with respect to our opportunity to displace ASICs and ASSPs, as our newest products are several process generations ahead of mainstream ASICs and ASSPs, and the resulting FPGA cost advantage is accelerating ASIC and ASSP displacement. As we have seen over the last several years, there are long-term technology-based trends that favor FPGAs.

Net sales increased by 64% in 2010 from 2009, outpacing the general semiconductor, ASIC, ASSP and PLD markets by a wide margin. The significant increase in net sales, primarily due to strong growth in sales of our New Products, was broad-based, covering large and small customer categories and all geographies.

Huawei Technologies Co., Ltd. (“Huawei”), an OEM, individually accounted for 13% of net sales in each of 2011 and 2010, and 11% in 2009. No other individual OEM accounted for more than 10% of net sales in 2011, 2010 or 2009. See also Note 5 - Accounts Receivable, Net and Significant Customers to our consolidated financial statements.

Sales by Product Category

We classify our products into three categories: New, Mainstream, and Mature and Other Products. The composition of each product category is as follows:


•	New Products include the Stratix^® V, Stratix IV, Arria^® V, ArriaII , Cyclone^® IV , MAX^® V, and HardCopy^® IV devices.


•	Mainstream Products include the Stratix III, Cyclone III, MAX II, and HardCopy III devices.


•	Mature and Other Products include the Stratix II , Stratix , Arria GX, Cyclone II, Cyclone, Classic™, MAX 3000A, MAX 7000, MAX 7000A, MAX 7000B, MAX 7000S, MAX 9000, HardCopy II, HardCopy, FLEX^® series, APEX™ series, Mercury™ and Excalibur™ devices, configuration and other devices, intellectual property cores, and software and other tools.

The product categories above approximate the relative life cycle stages of our products. During 2011, we adjusted product categories to move certain products from New Products to Mainstream Products and certain products from Mainstream Products to Mature and Other Products. All prior period data has been adjusted to conform to the current classification. New Products are primarily comprised of our most advanced products. Customers typically select these products for their latest generation of electronic systems. Demand is generally driven by prototyping and production needs. Mainstream Products are somewhat older products that are

generally no longer design-win vehicles. Demand is driven by customers' later stage production-based needs. Mature Products are yet older products with demand generated by the oldest customer systems still in production. This category also includes sales of software, intellectual property and other miscellaneous devices.

Net Sales by product category were as follows:



							Annual Growth Rate
	2011		2010		2009		2011		2010

New	22	%	11	%	3	%	107	%	587	%
Mainstream	34	%	32	%	21	%	11	%	146	%
Mature and Other	44	%	57	%	76	%	(18	)%	22	%
Net Sales	100	%	100	%	100	%	6	%	64	%

Sales by Vertical Market

The following vertical market data is derived from data that is provided to us by our distributors and end customers. With a broad base of customers, who in some cases manufacture end products spanning multiple market segments, the assignment of net sales to a vertical market requires the use of estimates, judgment and extrapolation. As such, actual results may differ from those reported.

Net Sales by vertical market were as follows:



							Annual Growth Rate
	2011		2010		2009		2011		2010

Telecom & Wireless	43	%	44	%	44	%	4	%	64	%
Industrial Automation, Military & Automotive	23	%	21	%	22	%	12	%	61	%
Networking, Computer & Storage	17	%	14	%	14	%	29	%	55	%
Other	17	%	21	%	20	%	(13	)%	73	%
Net Sales	100	%	100	%	100	%	6	%	64	%

Sales of FPGAs and CPLDs

Our PLDs consist of field-programmable gate arrays, or FPGAs, and complex programmable logic devices, or CPLDs. FPGAs consist of our Stratix, Cyclone, Arria, APEX, FLEX and ACEX series, as well as our Excalibur and Mercury families. CPLDs consist of our MAX, MAX II, and Classic families. Our other products consist of HardCopy, HardCopy II and other masked programmed logic devices, configuration devices, software and other tools and IP cores (collectively, “Other Products”).

Net sales of FPGAs, CPLDs and Other Products were as follows:



							Annual Growth Rate
	2011		2010		2009		2011		2010

FPGA	81	%	82	%	77	%	5	%	73	%
CPLD	10	%	12	%	15	%	(11	)%	29	%
Other Products	9	%	6	%	8	%	41	%	36	%
Net Sales	100	%	100	%	100	%	6	%	64	%

Sales by Geography

The following table is based on the geographic location of the original equipment manufacturers or the distributors who purchased our products. The geographic location of distributors may be different from the geographic location of the ultimate end users.

Net Sales by geography were as follows:



							Annual Growth Rate
	2011		2010		2009		2011		2010

Americas	19	%	19	%	20	%	7	%	50	%
Asia Pacific	41	%	42	%	40	%	2	%	74	%
EMEA	25	%	23	%	22	%	17	%	71	%
Japan	15	%	16	%	18	%	(1	)%	47	%
Net Sales	100	%	100	%	100	%	6	%	64	%

Price Concessions and Product Returns from Distributors

We sell the majority of our products to distributors worldwide at a list price. Our distributors resell our products to end customers at a very broad range of individually negotiated prices based on a variety of factors, including customer, product, quantity, geography and competitive differentiation. Under these circumstances, we remit back to the distributor a portion of its original purchase price after the resale transaction is completed and we validate the distributor's resale information, including end customer, device, quantity and price, against the distributor price concession that we have approved in advance. To receive price concessions, distributors must submit the price concession claims to us for approval within 60 days of the resale of the product to an end customer. Primarily because of the uncertainty related to the final price, we defer revenue recognition on sales to distributors until our products are sold from the distributor to the end customer, which is when our price is fixed or determinable. Accordingly, these pricing uncertainties impact our results of operations, liquidity and capital resources. Total price concessions earned by distributors were $4.0 billion and $6.0 billion for 2011 and 2010, respectively. See Note 9 - Deferred Income and Allowances on Sales to Distributors to our consolidated financial statements. Average aggregate price concessions typically range from 65% to 80% of our list price on an annual basis, depending upon the composition of our sales, volume and factors associated with timing of shipments to distributors or payment of price concessions.

Our distributors have certain rights under our contracts to return defective, overstocked, obsolete and discontinued products. Our stock rotation program generally allows distributors to return unsold product to Altera, subject to certain contract limits, based on a percentage of sales occurring over various periods prior to the stock rotation. Products resold by the distributor to end customers are no longer eligible for return, unless specifically authorized by us. In addition, we generally warrant our products against defects in material, workmanship and non-conformance to our specifications. Returns from distributors totaled $127.6 million and $178.4 million for 2011 and 2010, respectively. See Note 9 - Deferred Income and Allowances on Sales to Distributors to our consolidated financial statements.

Gross Margin



	2011		2010		2009

Gross Margin Percentage	70.4	%	71.0	%	66.8	%

Our gross margin rates are heavily influenced by both vertical market mix and the timing of material cost improvements. While these variables will continue to fluctuate on a quarterly basis, our gross margin target over the long term is 67%. We believe that the 67% gross margin target will enable us to achieve our desired balance between growth and profitability. Our gross margin percentage decreased in 2011 by 0.6 points when compared with 2010. The decrease was primarily due to the change in the mix of revenue by vertical market.

Gross margin percentage increased in 2010 by 4.2 points compared to 2009, primarily as a result of manufacturing cost reductions, specifically due to improved yields on certain of our new products and increased efficiency in our processes.

Research and Development Expense

Research and development expense includes costs for compensation and benefits, development masks, prototype wafers, and depreciation and amortization. These expenditures are for the design of new PLD and ASIC families, the development of process technologies, new package technology, software to support new products and design environments and IP cores.

We will continue to make significant investments in the development of new products and focus our efforts on the development of new programmable logic devices that use advanced semiconductor wafer fabrication processes, as well as related development software. We are currently investing in the development of future silicon products, as well as our Quartus II software, our library of IP cores and other future products.



($ in millions)	2011			2010			2009			2011 vs. 2010 Change		2010 vs. 2009 Change

Research and Development Expense	$	325.7		$	264.6		$	260.2		23	%	2	%

Percentage of Net Sales	15.8		%	13.5		%	21.8		%

Research and development expense for 2011 increased by $61.1 million, or 23%, compared with 2010. The increase was primarily attributable to a $23.8 million increase in personnel-related costs due to increased head count to support our product development efforts, a $9.1 million increase in stock-based compensation driven by an increase in our stock price, and a $25.0 million increase in external costs associated with product development activities.

Research and development expense for 2010 increased by $4.4 million, or 2%, when compared with 2009. The increase was primarily attributable to the following offsetting factors: a $17.2 million increase in variable compensation expense based on improved operating results for 2010, the absence of a gain of $3.6 million from the substantive termination of our retiree medical plan during 2009, a $3.0 million increase in consulting services and a $19.5 million decrease in external costs due to the timing of product development activities. See Note 16 - Employee Benefit Plans for a detailed discussion of the substantive termination of our retiree medical plan in 2009.

Selling, General, and Administrative Expense

Selling, general, and administrative expense primarily includes compensation and benefits related to sales, marketing and administrative employees, commissions and incentives, depreciation, legal, advertising, facilities and travel expenses.



($ in millions)	2011			2010			2009			2011 vs. 2010 Change		2010 vs. 2009 Change

Selling, General and Administrative Expense	$	279.2		$	254.5		$	234.1		10	%	9	%

Percentage of Net Sales	13.5		%	13.0		%	19.6		%

Selling, general, and administrative expense for 2011 increased by $24.7 million, or 10%, when compared with 2010. The increase was primarily attributable to an $8.3 million increase in personnel-related costs to support the growth in our business, an $11.1 million increase in stock-based compensation driven by an increase in our stock price and a $6.3 million increase in professional services and consulting fees.

Selling, general, and administrative expense for 2010 increased by $20.4 million, or 9%, when compared with 2009. The increase was primarily attributable to an $8.3 million increase in variable compensation expense based on higher operating results for 2010, the absence of a gain of $2.6 million from the substantive termination of our retiree medical plan during 2009, a $6.0 million increase in commission expenses driven by higher sales volume and the absence of a benefit of $2.3 million from a change in estimate of our allowance for doubtful accounts during 2009.

Deferred Compensation Plan

We allow our U.S.-based officers and director-level employees to defer a portion of their compensation under the Altera Corporation Non-Qualified Deferred Compensation Plan (the “NQDC Plan”). Since the inception of the NQDC Plan, we have not made any contributions to the NQDC Plan and we have no commitments to do so in the future. There are no NQDC Plan provisions that provide for any guarantees or minimum return on investments. Investment income or loss earned by the NQDC Plan is recorded as Loss (gain) on deferred compensation plan securities in our consolidated statements of income. We reported losses (gains) on NQDC Plan assets of $2.0 million, $(6.8) million and $(11.8) million in 2011, 2010 and 2009, respectively. These amounts resulted from the overall market performance of the underlying securities. The investment loss (gain) also represents a decrease (increase) in the future payout to employees and is recorded as Compensation (benefit) expense - deferred compensation plan in our consolidated statements of income. The compensation (benefit) expense associated with our deferred compensation plan obligations is offset by losses (gains) from related securities. The net effect of the investment income or loss and related compensation expense or benefit has no impact on our income before income taxes, net income, or cash balances. See Note 16 - Employee Benefits Plans to our consolidated financial statements for a detailed discussion of our NQDC Plan.

Interest Income and Other

Interest income and other consists mainly of interest income generated from investments in high-quality fixed income securities. Interest income and other remained relatively flat in 2011 compared with 2010 as neither returns nor invested balances changed significantly. The decrease in Interest income and other in 2010 compared with 2009, was primarily due to a decrease in interest income as a result of lower returns on our money market funds, partially offset by the effect of an increase in invested balances.

Interest Expense

The year-over-year decrease for the periods presented in Interest expense was due primarily to the slight decrease of the LIBOR rate, which represents the principal basis of our interest rate on the outstanding borrowings under our long term credit facility.

Income Tax Expense

Our effective tax rate reflects the impact of significant amounts of our earnings being taxed in foreign jurisdictions at rates substantially below the U.S. statutory rate. Our effective tax rates were 9.2% for 2011, 9.8% for 2010 and 17.8% for 2009.

During 2011, we reversed $4.3 million of liabilities for uncertain tax positions as a result of a Statutory Notice of Deficiency received from the Internal Revenue Service for 2002 through 2004. In addition, we reversed $8.2 million of liabilities for uncertain tax positions upon expiration of the statutes of limitations and settlement with certain foreign jurisdictions. In 2010, we reversed $19.4 million of liabilities for uncertain tax positions, partially offset by an $8.2 million charge related to the revaluation of our state deferred tax assets. Additional detail related to the 2010 adjustments is presented below. Our 2011 effective tax rate was favorably affected by the higher benefit of the 2011 adjustments as compared to 2010.

The significant net decrease in our effective tax rate in 2010 when compared with 2009 was primarily due to the following factors. During 2010, we reversed $11.7 million of liabilities that were originally recorded in 2009 for uncertain tax positions as a result of a court decision issued in March 2010, holding that stock-based compensation was not required to be included in certain transfer pricing arrangements between a U.S. company and its foreign subsidiary. Due to the expiration of the statute of limitations for certain foreign jurisdictions, we reversed $7.7 million of liabilities for uncertain tax positions. In addition, the decrease in our effective tax rate was also due to the impact of proportionately higher earnings in foreign jurisdictions taxed at rates below the U.S. statutory tax rate, partially offset by the increase in the effective tax rate due to a California law change providing the option to elect an alternative method to attribute taxable income to California effective January 1, 2011. As a result, we revalued our state deferred tax assets that are expected to reverse after the effective date of the change and recognized discrete income tax expense charges of $8.2 million during 2010.

Restructuring Charges

During 2009, we announced a net reduction of approximately 120 positions. We incurred restructuring-related charges of approximately $10.0 million in 2009. The charges were comprised of employee severance costs of approximately $7.6 million, charges related to the termination of certain external sales representatives of approximately $2.3 million and operating lease impairment charges of approximately $0.1 million. As a result of the workforce reduction, our approximate annual net cost savings are $20.0 million.

The restructuring charges for 2009 are included in our consolidated statements of income as follows:



(In thousands)
Cost of sales	$	137
Research and development expense	4,104
Selling, general, and administrative expense	5,728
	$	9,969

No significant restructuring activities were initiated in 2011 or 2010.

All restructuring obligations were fully settled as of December 31, 2011. See Note 18 - Restructuring Charges to our consolidated financial statements for additional information.

Financial Condition, Liquidity, Credit Facility and Capital Resources

Overview

We derive our liquidity and capital resources primarily from our cash flows from operations. We have a $750 million unsecured revolving credit facility (the “Facility”), which has been used primarily to fund common stock repurchases and to realign our capital structure. As of December 31, 2011, we have borrowed $500 million under the Facility. The remaining capacity of $250 million available under the Facility also represents a source of liquidity through its maturity date in August 2012. The terms of the Facility require compliance with certain financial and non-financial covenants. Financial covenants require us to maintain certain financial ratios related to interest coverage and financial leverage. As of December 31, 2011, we were in compliance with all such covenants. See Note 17 - Credit Facility to our consolidated financial statements for further discussion of the Facility. We are currently evaluating long-term financing alternatives to address our outstanding borrowings under the Facility plus additional capacity under the Facility that currently represents a source of liquidity.

We may use cash from operations and available amounts under the Facility for repurchases of our common stock, cash dividends, and capital expenditures. Based on past performance and current expectations, we believe our current available sources of funds including cash, cash equivalents, and the Facility, plus anticipated cash generated from operations and proceeds from any additional financing activities, will be adequate to finance our operations, stock repurchases, cash dividends and capital expenditures for at least the next year.

Our cash and cash equivalents balance increased by $0.6 billion during the year ended December 31, 2011. The change in cash and cash equivalents for 2011, 2010 and 2009 was as follows:



(In millions)	2011			2010			2009
Net cash provided by operating activities	$	959.6		$	856.7		$	372.7
Net cash used in investing activities	(170.9		)	(23		)	(13.9		)
Net cash (used in) provided by financing activities	(181.9		)	384.8			(28.9		)
Net increase in cash and cash equivalents	$	606.7		$	1,218.5		$	329.9

Total cash and cash equivalents accounted for 79% and 74% of total assets at December 31, 2011 and 2010, respectively.

Operating Activities

In 2011, our operating activities provided $959.6 million in cash, primarily attributable to net income of $770.7 million, adjusted for non-cash stock-based compensation expense of $81.6 million (net of related tax effects), depreciation and amortization of $31.9 million, deferred income tax expense of $15.7 million and changes in working capital accounts. Significant changes in working capital accounts (excluding cash and cash equivalents) included a $131.3 million decrease in Accounts receivable, net, a $24.2 million decrease in Inventories, a $54.7 million decrease in Other assets, a $32.5 million decrease in Accounts payable and other liabilities, a $148.8 million decrease in Deferred income and allowances on sales to distributors and a $31.1 million increase in Income tax payable.

Our sales to distributors are primarily made under agreements allowing for subsequent price adjustments and returns, and we defer recognition of revenue until the products are resold by the distributor. At the time of shipment to distributors, we (1) record a trade receivable at the list selling price since there is a legally enforceable obligation from the distributor to pay us

currently for product delivered, (2) relieve inventory for the carrying value of goods shipped since legal title has passed to the distributor, and (3) record deferred revenue and deferred cost of sales in Deferred income and allowances on sales to distributors in the liability section of our condensed consolidated balance sheets. Decreases in Accounts receivable, net associated with lower billings are generally offset by corresponding decreases in Deferred income and allowances on sales to distributors. However, timing differences between gross billings, advances to distributors, discounts earned, collections, revenue recognition and changes in the mix of sales to OEMs and distributors may result in a temporary interruption to the normal relationship between these two accounts.

The $131.3 million decrease in Accounts receivable, net, and the $148.8 million decrease in Deferred income and allowances on sales to distributors principally related to decreased gross billings to distributors and OEMs associated with less demand for our products in the fourth quarter of 2011 compared with the same period in 2010.

The $24.2 million decrease in Inventories was attributable to proactive management of our inventory levels. The $54.7 million decrease in Other assets primarily resulted from returns of advances from distributors and a decrease in prepaid amounts. The repayment of advances by distributors primarily resulted from changes in inventory levels held under distributor funding arrangements. The $32.5 million decrease in Accounts payable and other liabilities was primarily attributable to the decrease in inventory purchased as a result of the previously mentioned proactive management of our inventory levels. The $31.1 million increase in Income tax payable was primarily attributable to higher tax liabilities due to increased earnings in 2011 along with timing related to the payment of taxes.

In 2010, our operating activities provided $856.7 million in cash, primarily attributable to net income of $782.9 million, adjusted for non-cash stock-based compensation expense of $67.7 million (net of related tax effects), depreciation and amortization of $27.5 million, and deferred income tax expense of $34.3 million and changes in working capital accounts. Significant changes in working capital accounts (excluding cash and cash equivalents) included a $145.3 million increase in Accounts receivable, net, a $59.2 million increase in Accounts payable and other liabilities, a $146.8 million increase in Deferred income and allowances on sales to distributors, a $76.8 million increase in Inventories, a $52.8 million increase in Other assets and a $15.7 million increase in Income tax payable.

Investing Activities

During 2011, our investing activities resulted in a use of cash primarily for the purchase of available for sale securities of $164.4 million and purchases of property and equipment of $31.8 million, partially offset by cash proceeds from the maturities and sales of available-for-sale investments of $25.0 million.

During 2010, our investing activities primarily consisted of net sales of deferred compensation plan securities of $2.5 million, purchases of property and equipment of $12.4 million and purchase of intangible assets of $5.0 million. In addition, we made payments related to a business acquisition of $8.0 million, net of cash acquired.

Financing Activities

During 2011, our financing activities resulted in a use of cash for the repurchase of common stock of $197.0 million, dividend payments of $90.1 million, and minimum statutory withholding for vested restricted stock units of $32.2 million, partially offset by cash proceeds of $120.0 million from the issuance of common stock to employees through our employee stock plans.

During 2010, our financing activities primarily consisted of proceeds of $453.7 million from the issuance of common stock to employees through our employee stock plans, partially offset by cash dividend payments of $67.8 million, principal payments on capital lease obligations of $2.9 million and minimum statutory withholding for vested restricted stock units of $20.2 million.

Our dividend policy could be impacted in the future by, among other items, future changes in our cash flows from operations and our capital spending needs such as those relating to research and development, investments and acquisitions, common stock repurchases and other strategic investments.

Contractual Obligations

The following table summarizes our significant contractual cash obligations as of December 31, 2011, and the effect that such obligations are expected to have on liquidity and cash flows in future periods:



			Payments Due by Period
(In millions)	Total		Less than 1 Year		1-3 Years		3-5 Years		More than 5 Years
Operating lease obligations ⁽¹⁾	$	36.7	$	8.5	$	11.6	$	5.8	$	10.8
Wafer purchase obligations ⁽²⁾	103.8		103.8		—		—		—
Credit facility	500.0		500.0		—		—		—
Interest on credit facility ⁽³⁾	2.3		2.3		—		—		—
Obligations under service award program ⁽⁴⁾	8.5		2.0		0.9		2.3		3.3
Electronic design automation software licenses⁽⁵⁾	33.4		27.6		5.8		—		—
Total contractual cash obligations	$	684.7	$	644.2	$	18.3	$	8.1	$	14.1


(1)	We lease facilities under non-cancelable lease agreements expiring at various times through 2017. Rental expense under all operating leases was to $8.1 million in 2011, and $9.0 million in each of 2010 and 2009.


(2)	Due to lengthy subcontractor lead times, we must order materials and services from these subcontractors well in advance, and we are obligated to pay for the materials once they are completed. We expect to receive and pay for these materials in 2012.

(3)

Interest is based on the outstanding credit facility balance and rate in effect as of December 31, 2011. The contractual amounts to be paid are affected by changes in market interest rates. The LIBOR rate used in the calculation of the future interest payments is 0.29% (based on rates in effect as of December 31, 2011). Future changes in market interest rates could materially affect the contractual amounts to be paid.


(4)	We offer to our U.S and non-U.S. employees participation in the Service Award Program (“SAP”). The SAP provides employees with one to four weeks of additional paid vacation upon their attainment of five, ten, fifteen, twenty, twenty-five and thirty-year service anniversaries. See Note 16 - Employee Benefits Plans to our consolidated financial statements.


(5)	As of December 31, 2011, we had $33.4 million of non-cancelable license obligations to providers of electronic design automation software and maintenance expiring at various dates throughout December 2014.

Due to the uncertainty with respect to the timing of future cash flows associated with our unrecognized tax benefits as of December 31, 2011, we are unable to make reasonably reliable estimates of the period of cash settlement with the respective taxing authority. Therefore, $263.4 million of unrecognized tax benefits classified as Income tax payable- non-current in the accompanying consolidated balance sheet as of December 31, 2011, have been excluded from the contractual obligations table above. See Note 14 - Income Taxes to our consolidated financial statements for a discussion of income taxes.

In addition to the above obligations we enter into a variety of agreements and financial commitments in the normal course of business. It is not possible to predict the maximum potential amount of future payments under these or similar agreements due to the conditional nature of our obligations and the unique facts and circumstances involved in each particular agreement. Historically, payments pursuant to such agreements have not been material. We believe that any future payments required pursuant to such agreements would not be significant to our consolidated financial condition or operating results.

Impact of Foreign Currency and Inflation

We have international operations and incur expenditures in currencies other than U.S. dollars. For non-U.S. subsidiaries and branches, foreign currency transaction gains and losses and the impact of the remeasurement of local currency assets and liabilities into U.S. dollars in 2011, 2010 and 2009 were not significant. We do not enter into foreign exchange transactions for trading or speculative purposes.

Common Stock Repurchases

We repurchase shares under our stock purchase program announced on July 15, 1996, which has no specified expiration. No existing repurchase plans or programs have expired, nor have we decided to terminate any repurchase plans or programs prior to expiration. Since the inception of our stock repurchase program through December 31, 2011, our board of directors has authorized 193.0 million shares for repurchase and we have repurchased a total of 183.1 million shares of our common stock

for an aggregate cost of $3.9 billion. As of December 31, 2011, 9.9 million shares remained authorized for repurchase under our stock repurchase program.

Common stock repurchase activity for 2011 was as follows:



(In millions, except per share amounts)

Shares repurchased	4.8
Cost of shares repurchased	$	197.0
Average price per share	$	41.05

No shares were repurchased in 2010 or 2009.

Off-balance Sheet Arrangements

As of December 31, 2011, we did not have any off-balance sheet arrangements, as defined in Item 303(a)(4)(ii) of SEC Regulation S-K.

Subsequent Events

On January 23, 2012, our board of directors declared a cash dividend of $0.08 per common share payable on March 1, 2012 to stockholders of record on February 10, 2012.

On January 23, 2012, the Internal Revenue Service issued a Statutory Notice of Deficiency claiming that we owe additional taxes in the amount of $21.4 million for the fiscal years 2005, 2006 and 2007, excluding interest and penalties. We are evaluating our course of action relating to this assessment. We believe we have made adequate tax payments and/or accrued adequate amounts such that the outcome of this litigation will not have a material adverse effect on our consolidated operating results.

New Accounting Pronouncements

The information contained in Note 2 - Significant Accounting Policies to our consolidated financial statements in Part II, Item 8 under the heading "New Accounting Pronouncements" is incorporated by reference into this Part II, Item 7.

ITEM 7A. QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK.

Interest Rate Risk

While we are exposed to interest rate fluctuations in many of the world's leading industrialized countries, our interest income and expense is most sensitive to fluctuations in the general level of U.S. interest rates. Our investment strategy is focused on preservation of capital while maximizing yields and supporting our liquidity requirements. Our exposure to market risk as a result of changes in interest rates relates primarily to our cash and cash equivalents, investments in debt instruments and certain interest-rate sensitive assets held under the NQDC Plan and our credit facility (the "Facility"). Our investment portfolio and NQDC Plan assets include holdings of various issuers, types and maturity dates.

The market value of these investments on any given day during the investment term may vary as a result of market interest rate fluctuations. A hypothetical 10% movement in interest rates during the investment term would not likely have a material impact on the fair value of the portfolio. The actual impact on the fair value of the portfolio in the future may differ materially from this analysis, depending on actual balances and changes in the timing and the amount of interest rate movements.

Our consolidated operating results are affected by, among other factors, interest income on our cash equivalents. If the interest rate declines, our consolidated operating results may be negatively impacted.

Our total borrowings under the Facility as of December 31, 2011 were $500 million. Borrowings under this Facility bear a variable interest rate at either a Eurodollar rate (“LIBOR”) or a Prime rate, at our option, plus an applicable margin based upon certain financial ratios, determined and payable quarterly. The interest rate as of December 31, 2011 was LIBOR plus 0.27%. In addition, we pay a facility fee on the entire Facility. This facility fee varies with certain financial ratios and was 0.08% as of December 31, 2011.

Our consolidated operating results and cash flows are exposed to changes in interest rates that could adversely affect the amount of interest expense incurred and paid on the Facility in any given period. Due to the variable interest rate on the Facility, the fair value of the Facility would not likely be materially affected by any future changes in interest rates.

Equity Price Risk

We are exposed to equity price risk inherent in the marketable equity securities held in our investment portfolio and our NQDC Plan. A hypothetical 10% adverse change in the stock prices of these equity securities would not result in a material impact on our consolidated financial position, operating results or cash flows.

Foreign Currency Risk

We have international operations and incur expenditures in currencies other than U.S. dollars. To date, our exposure to exchange rate volatility, resulting from foreign currency transaction gains and losses and remeasurement of local currency assets and liabilities into U.S. dollars, has been insignificant. If foreign currency rates were to fluctuate by 10% from rates in effect at December 31, 2011, the resulting transaction gains or losses and the effects of remeasurement would not materially affect our consolidated financial position, operating results or cash flows.

ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA.



Table Of Contents
		Page
Consolidated Balance Sheets as of December 31, 2011 and December 31, 2010		44
Consolidated Statements of Income for each of the three years in the period ended December 31, 2011		45
Consolidated Statements of Cash Flows for each of the three years in the period ended December 31, 2011		46
Consolidated Statements of Stockholders' Equity for each of the three years in the period ended December 31, 2011		47
Notes to the Consolidated Financial Statements		48
Report of Independent Registered Public Accounting Firm		72
Financial Statement Schedules
All schedules have been omitted as they are either not applicable or the required information is included in the financial statements or notes thereto.
Supplementary Financial Data (unaudited)		73

ALTERA CORPORATION

CONSOLIDATED BALANCE SHEETS



(In thousands, except par value amount)	December 31, 2011			December 31, 2010
Assets
Current assets:
Cash and cash equivalents	$	3,371,933		$	2,765,196
Short-term investments	65,222			—
Total cash, cash equivalents, and short-term investments	3,437,155			2,765,196
Accounts receivable, net	232,273			363,614
Inventories	122,279			146,524
Deferred income taxes - current	58,415			66,839
Deferred compensation plan - marketable securities	54,041			54,419
Deferred compensation plan - restricted cash equivalents	17,938			19,817
Other current assets	52,710			114,601
Total current assets	3,974,811			3,531,010
Property and equipment, net	171,721			164,155
Long-term investments	74,033			—
Deferred income taxes - non-current	26,629			37,319
Other assets, net	35,074			27,353
Total assets	$	4,282,268		$	3,759,837

Liabilities and stockholders' equity
Current liabilities:
Accounts payable	$	52,154		$	86,061
Accrued liabilities	34,029			23,278
Accrued compensation and related liabilities	78,181			83,773
Deferred compensation plan obligations	71,979			74,236
Deferred income and allowances on sales to distributors	279,876			428,711
Income taxes payable	—			428
Credit facility	500,000			—
Total current liabilities	1,016,219			696,487
Income taxes payable - non-current	263,423			231,833
Credit facility	—			500,000
Other non-current liabilities	8,730			7,865
Total liabilities	1,288,372			1,436,185
Commitments and contingencies
(See “Note 10 - Commitments and Contingencies”)
Stockholders' equity:
Common stock: $.001 par value; 1,000,000 shares authorized; outstanding - 322,054 at December 31, 2011 and 319,494 at December 31, 2010	322			319
Capital in excess of par value	1,050,752			908,989
Retained earnings	1,942,955			1,414,344
Accumulated other comprehensive loss	(133		)	—
Total stockholders' equity	2,993,896			2,323,652
Total liabilities and stockholders' equity	$	4,282,268		$	3,759,837

See accompanying notes to consolidated financial statements.

ALTERA CORPORATION

CONSOLIDATED STATEMENTS OF INCOME



	YEARS ENDED
(In thousands, except per share amounts)	December 31, 2011			December 31, 2010			December 31, 2009
Net sales	$	2,064,475		$	1,954,426		$	1,195,413
Cost of sales	610,329			566,942			396,584
Gross margin	1,454,146			1,387,484			798,829
Research and development expense	325,733			264,649			260,208
Selling, general, and administrative expense	279,217			254,495			234,074
Compensation (benefit) expense - deferred compensation plan	(1,964		)	6,839			11,776
Loss (gain) on deferred compensation plan securities	1,964			(6,839		)	(11,776		)
Interest income and other	(3,526		)	(3,330		)	(6,083		)
Interest expense	3,730			3,843			5,092
Income before income taxes	848,992			867,827			305,538
Income tax expense	78,281			84,943			54,476
Net income	$	770,711		$	782,884		$	251,062

Net income per share:
Basic	$	2.39		$	2.55		$	0.85
Diluted	$	2.35		$	2.49		$	0.84

Shares used in computing per share amounts:
Basic	321,892			307,302			294,493
Diluted	327,606			313,912			297,180

Cash dividends per common share	$	0.28		$	0.22		$	0.20

See accompanying notes to consolidated financial statements.

ALTERA CORPORATION

CONSOLIDATED STATEMENTS OF CASH FLOWS



	YEARS ENDED
(In thousands)	December 31, 2011			December 31, 2010			December 31, 2009
Cash Flows from Operating Activities:
Net income	$	770,711		$	782,884		$	251,062
Adjustments to reconcile net income to net cash provided by operating activities:
Depreciation and amortization	31,927			27,535			29,022
Stock-based compensation	82,750			62,118			64,446
Deferred income tax expense (benefit)	15,657			34,256			(5,890		)
Tax effect of employee stock plans	16,162			27,444			(3,648		)
Excess tax benefit from employee stock plans	(17,307		)	(21,866		)	(990		)
Gain on substantive termination of retiree medical plan	—			—			(6,488		)
Changes in assets and liabilities, net of the effects of acquisition:
Accounts receivable, net	131,341			(145,330		)	(136,115		)
Inventories	24,245			(76,819		)	14,931
Other assets	54,661			(52,805		)	38,862
Accounts payable and other liabilities	(32,534		)	59,200			7,918
Deferred income and allowances on sales to distributors	(148,836		)	146,826			77,611
Income taxes payable	31,116			15,746			39,860
Deferred compensation plan obligations	(293		)	(2,494		)	2,125
Net cash provided by operating activities	959,600			856,695			372,706
Cash Flows from Investing Activities:
Purchases of property and equipment	(31,812		)	(12,442		)	(11,060		)
Purchases of available-for-sale securities	(164,408		)	—			—
Proceeds from the maturities and sales of available-for-sale investments	25,003			—			—
Acquisition related payments, net of cash acquired	—			(8,004		)	—
Sales (purchases) of deferred compensation plan securities, net	293			2,494			(2,125		)
Purchases of intangible assets	—			(5,000		)	(690		)
Net cash used in investing activities	(170,924		)	(22,952		)	(13,875		)
Cash Flows from Financing Activities:
Proceeds from issuance of common stock through various stock plans	119,989			453,719			42,144
Shares withheld for employee taxes	(32,152		)	(20,164		)	(10,738		)
Repurchases of common stock	(197,023		)	—			—
Payment of dividends to stockholders	(90,060		)	(67,774		)	(58,925		)
Excess tax benefit from stock-based compensation	17,307			21,866			990
Principal payments on capital lease obligations	—			(2,866		)	(2,373		)
Net cash (used in) provided by financing activities	(181,939		)	384,781			(28,902		)
Net increase in cash and cash equivalents	606,737			1,218,524			329,929
Cash and cash equivalents at beginning of period	2,765,196			1,546,672			1,216,743
Cash and cash equivalents at end of period	$	3,371,933		$	2,765,196		$	1,546,672
Supplemental cash flow information:
Income taxes paid, net	$	9,856		$	29,887		$	7,310
Interest paid	$	3,704		$	3,395		$	4,503

See accompanying notes to consolidated financial statements.

ALTERA CORPORATION

CONSOLIDATED STATEMENTS OF STOCKHOLDERS' EQUITY

(In thousands)

Number of

Common

Stock and

Capital In

Excess of

Par Value

Retained

Earnings

Accumulated

Other

Comprehensive

Loss

Total

Shareholders'

Equity

Balance, December 31, 2008

292,733

272,717